An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancelation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.

An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancelation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.

A multi-phase clock circuit includes a first delay circuit, a second delay circuit, a third delay circuit, a first clock mixer circuit, and a second clock mixer circuit. The first, second, and third delay circuits are coupled in series. The first clock mixer circuit includes a first input and a second input. The first input is coupled to an output of the first delay circuit. The second input is coupled to an output of the second delay circuit. The second clock mixer circuit also includes a first input and a second input. The first input of the second clock mixer circuit is coupled to an output of the second delay circuit. The second input of the second clock mixer circuit is coupled to an output of the third delay circuit.

The disclosure relates to a local coil with a device for providing a first mixed frequency signal and a second mixed frequency signal by a first auxiliary frequency signal and a second auxiliary frequency signal. The device has an auxiliary mixer configured to generate the second mixed frequency signal from the first auxiliary frequency signal and the second auxiliary frequency signal. The local coil has a signal input including a first signal connection to the device. The local coil is configured to jointly receive the first auxiliary frequency signal and the second auxiliary frequency signal by way of the signal input and supply them to the device by way of the first signal connection.

The disclosure relates to a local coil with a device for providing a first mixed frequency signal and a second mixed frequency signal by a first auxiliary frequency signal and a second auxiliary frequency signal. The device has an auxiliary mixer configured to generate the second mixed frequency signal from the first auxiliary frequency signal and the second auxiliary frequency signal. The local coil has a signal input including a first signal connection to the device. The local coil is configured to jointly receive the first auxiliary frequency signal and the second auxiliary frequency signal by way of the signal input and supply them to the device by way of the first signal connection.

A variable frequency oscillator circuit for generating an oscillating signal of a desired frequency, comprising a fixed frequency oscillator; one or more frequency dividers, arranged to receive the output of the fixed frequency oscillator and generate a signal with a divided frequency; and one or mixers, arranged to mix the outputs of the one or more frequency dividers to generate the oscillating signal of the desired frequency. The variable frequency oscillator circuit is arranged to modify the operation of the one or more mixers to suppress any unwanted signals in the generated oscillating signal.

A variable frequency oscillator circuit for generating an oscillating signal of a desired frequency, comprising a fixed frequency oscillator; one or more frequency dividers, arranged to receive the output of the fixed frequency oscillator and generate a signal with a divided frequency; and one or mixers, arranged to mix the outputs of the one or more frequency dividers to generate the oscillating signal of the desired frequency. The variable frequency oscillator circuit is arranged to modify the operation of the one or more mixers to suppress any unwanted signals in the generated oscillating signal.

Techniques are described for reducing frequency pulling in voltage-controlled oscillator (VCO) circuits. Some embodiments operate in context of a transmitter having a VCO and a power amplifier (PA), where resonant components of the VCO are impacted by magnetically coupled feedback from resonant components of the PA. The VCO and PA are coupled via a set of signal path components that cause signal path delay, such that the feedback signal is phase-delayed with respect to the signal generated by the VCO. A coupling delay matching system is used to introduce additional delay, thereby further phase-shifting the feedback signal to an integer multiple of half of the oscillation period of the VCO signal; thereby reducing frequency pulling of the VCO.

Techniques are described for reducing frequency pulling in voltage-controlled oscillator (VCO) circuits. Some embodiments operate in context of a transmitter having a VCO and a power amplifier (PA), where resonant components of the VCO are impacted by magnetically coupled feedback from resonant components of the PA. The VCO and PA are coupled via a set of signal path components that cause signal path delay, such that the feedback signal is phase-delayed with respect to the signal generated by the VCO. A coupling delay matching system is used to introduce additional delay, thereby further phase-shifting the feedback signal to an integer multiple of half of the oscillation period of the VCO signal; thereby reducing frequency pulling of the VCO.

An example frequency converter includes a drift canceling loop with a balanced delay and a linear signal path (e.g., linear with respect to frequency scaling, amplitude modulation, and/or phase modulation). One side of the drift canceling loop includes a fixed delay, and the opposite side includes an adjustable, complementary delay. The adjustable, complementary delay facilitates precision matching of the signal delays on each side of the loop over a range of frequencies, which results in a significant improvement in noise cancelation, particularly at large offsets to the carrier, while permitting the use of a higher noise, but very fast tuning course scale oscillator. The linear signal path from the signal generator to an RF output facilitates modulation of the signal by the signal generator. A modular format is an advantageous embodiment of the invention that includes the removal of the frequency synthesizer's low phase noise reference into a separate module.