A wireless communication device is presented for use with a sensor. The wireless communication device includes: an antenna, a driver circuit and a bias circuit. The driver circuit is electrically coupled to the antenna and includes at least one pair of cross-coupled transistors. The bias circuit is electrically coupled to the driver circuit. In a transmit mode, the bias circuit biases the driver circuit with a first bias current. In response to the first bias current, the driver circuit oscillates the antenna. In a receive mode, the bias circuit biases the driver circuit with a second bias current, such that the first bias current differs from the second bias current. In response to the second bias current, the bias circuit amplifies a signal received by the antenna.

A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately /2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.

Systems and methods for synchronous demodulation using passive sampled analog filtering are disclosed. A system for synchronous demodulation includes an input channel for accepting an input signal, a first passive sampled analog filter for filtering the input signal, a mixer for mixing the filtered input signal and outputting a mixed signal, a second passive sampled analog filter for filtering the mixed signal, and an output channel for outputting the filtered mixed signal.

A receiver for digital signals includes a radiofrequency stage. A feedback loop controls a variable attenuation resistance applied to a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of an amplitude of the modulated radiofrequency signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The value of the variable resistance is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation.

Apparatus comprises a memory configured to store a matrix of transmit data; a multi-element antenna; and a transmitter configured to transmit a signal from a multi-element antenna as part of a packet within a transmit period in a switching interval by: switching between different elements of the multi-element antenna in a sequence of transmit intervals within the transmit period; and deriving the signal for transmission in different transmit intervals from different ones of the transmit data in the matrix. Also, apparatus comprises a receiver configured to receive plural packets; and an accumulator configured, for each packet, to accumulate signals received in a switching interval of the packet. The apparatus is configured to: derive a correlation metric for each of the packets from the accumulated signals for the packets; identify a packet with the best correlation metric; identify a direction associated with the packet identified as having the best correlation metric; and provide the direction as an output.

An electronic device may be provided with an antenna, a receiver, and baseband circuitry coupled to the receiver over a digital interface. The receiver may receive radio-frequency signals using the antenna and may generate digital in-phase and quadrature-phase (I/Q) samples from the radio-frequency signals. The I/Q samples may have a bit width and may be transmitted to the baseband circuitry over the digital interface. The baseband circuitry may evaluate a radio condition of the receiver based on the I/Q samples. The baseband circuitry may adjust the bit width of the I/Q samples based on the radio condition. For example, the baseband circuitry may decrease the bit width when wireless performance metric data falls below a threshold and/or may increase the bit width when the wireless performance metric data exceeds a threshold. This may minimize power consumed by the digital interface without sacrificing wireless performance.

In a digital envelope detector circuit, an input terminal receives a digital input signal and an output terminal produces a digital output signal. First and second digital processing circuitry between the input and output terminals each includes a memory element. The first processing circuitry applies low-pass filtering to the digital input signal. The second processing circuitry processes the digital input signal, stores in the memory element a value indicative of the processed digital input signal, and processes the output from the memory element so that the digital input signal is passed unaltered. A digital comparator circuit compares the digital input and output signals, asserts a control signal in response to the digital input signal being higher, and de-asserts the control signal in response to the digital input signal being lower. The first/second processing circuitry produces the digital output signal in response to the control signal being de-asserted/asserted.