A circuit for subharmonic detection includes in-phase and quadrature mixers, first and second filters, and a processing circuit. The in-phase mixer has a first mixer input and a first mixer output. The quadrature mixer has a second mixer input and a second mixer output, the first mixer input coupled to the second mixer input. The first filter circuit has a first filter input and a first filter output, the first filter input coupled to the first mixer output. The second filter circuit has a second filter input and a second filter output, the second filter input coupled to the second mixer output. The processing circuit has a first input and a second input, the first input of the processing circuit coupled to the first filter output, the second input of the processing circuit coupled to the second filter output. The processing circuit is configured to detect a subharmonic component of a wave at the first mixer input and the second mixer input using a first direct current (DC) component at the first input of the processing circuit and a second DC component at the second input of the processing circuit.

A mixer with a filtering function and a method for linearization of the mixer are provided. The mixer includes at least one amplifier, a transconductance device and a feedback network. The at least one amplifier is configured to output a filtered voltage signal according to an input voltage signal. The transconductance device is coupled to the at least one amplifier, and is configured to generate a filtered current signal according to the filtered voltage signal. The feedback network is coupled between any output terminal among at least one output terminal of the transconductance device and an input terminal of the at least one amplifier. More particularly, the mixer is configured to output a modulated signal according to the filtered current signal.

Disclosed is a frequency mixer. The frequency mixer includes a first matching circuit that generates a matched local oscillator (LO) signal based on an LO signal, a non-linear circuit that generates a non-linear LO signal based on the matched LO signal, a second matching circuit that generates a matched radio frequency (RF) signal based on an RF signal, a mixing circuit that generates a mixed signal based on a mixing of the non-linear LO signal and the matched RF signal, a third matching circuit that generates an intermediate frequency (IF) signal based on the mixed signal, wherein the non-linear circuit includes a non-linear transistor, a bias transistor, and an internal matching circuit connected in series.

A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is implanted in the first region of the fins but not in the second regions. A gate structure overlies the first region of the fins and source/drains are formed on the second regions of the fins.

A travelling wave mixer (TWM) is provided that includes an input artificial transmission line configured to transmit an input signal, an output artificial transmission line configured to transmit an output signal, a local oscillator (LO) artificial transmission line configured to transmit an LO signal, and a plurality of mixer stages connected in parallel between the output artificial transmission and the input artificial transmission line. Each of the mixer stages includes an input amplifier, a mixer and an output amplifier connected in series between the input artificial transmission line and the output artificial transmission line, where an input of the mixer receives an output of the input amplifier, and an output of the mixer is applied to an input of the output amplifier. Further, each of the mixer stages includes a phase-adjustable LO amplifier circuit connected between the LO artificial transmission line and an LO input of the mixer, where the phase-adjustable LO amplifier is configured to adjust an LO signal phase applied to the LO input of each mixer to null out a phase error in each mixer stage independently.

A frequency multiplier includes an input section having inputs to receive an input signal having an input frequency, a mixer section, and an output section magnetically coupled to the input section and generating an output signal in response to the input signal. The mixer section may be coupled to the input section by a common mode node forming a path for a common mode current to flow to the mixer section and be magnetically coupled to the common mode node. The input section may generate a signal current, and the mixer section may be magnetically coupled to the input section and be directly capacitively coupled to the input section through a capacitor in a signal current path. The mixer section may have differential inputs capacitively coupled to the input section and also be coupled to the input section through a current path. A current helper section may be coupled to the current path.

The present invention disclosure provides a multiplier and a power factor correction circuit which the multiplier is applied. The multiplier comprises a Gilbert multiplier circuit comprising a first differential input stage, a second differential input stage and an output stage; a first differential voltage conversion circuit; a second differential voltage conversion circuit; and a bias current generating circuit; Wherein said output stage comprises: a current mirror unit comprising two current input terminals and a current output terminal; and a feedback control unit configured to ensure that the current output terminal does not output current when the voltage difference received by the multiplier is zero. The present invention is advantageous in improving the linearity of the multiplier and the accuracy of the output current of the multiplier output current.

A transceiver includes local oscillator (LO) signal circuitry configured to output an LO signal having an LO frequency and mixer circuitry configured to input the LO signal and an information signal that encodes communication data and output a shifted signal that corresponds to the information signal shifted to a desired frequency. The LO signal circuitry includes selection circuitry and generation circuitry. The selection circuitry is configured to select a pulse pattern and a gap duration based at least on a target harmonic of the LO frequency to be suppressed. The pulse pattern includes at least two pulses spaced apart by a gap having the gap duration. The generation circuitry is configured to generate an LO signal characterized by the selected pulse pattern and gap duration.

A filter circuitry (200) using an active inductor is disclosed. The filter circuitry (200) has a first terminal (In1/Out1) and a second terminal (In2/Out2). The filter circuitry (200) comprises a first transistor (M1) and a second transistor (M2). The filter circuitry (200) further comprises a first switch (S1), a second switch (S2), a first capacitor (C1), a second capacitor (C2) and a resistor (R). The first and second transistors (M1/M2) together with the resistor (R) and the first and second switches (S1/S2) are connected in a current mirror topology. The first and second capacitors (C1/C2) are connected at the first and second terminals of the filter circuitry (200) respectively. The filter circuitry (200) is configurable to either have the first terminal (In1/Out1) as input and the second terminal (In2/Out2) as output or have the first terminal (In1/Out1) as output and the second terminal (In2/Out2) as input by changing on-off states of the first and second switches. The transistors are interconnected in a current-mirror fashion. Depending on the switch position one of the transistors also acts as part of an active inductor such that the circuit functions as a low pass filter with a complex pole pair and a real pole. Depending on the switch position the LPF allows signal flow in either direction. For use in a TDD environment in combination with a passive mixer (420).

A novel semiconductor device is provided. The semiconductor device includes a mixer circuit and a bias circuit. The mixer circuit includes a voltage-to-current conversion portion, a current switch portion, and a current-to-voltage conversion portion. The bias circuit includes a bias supply portion and a first transistor. The voltage-to-current conversion portion includes a second transistor and a third transistor. The bias supply portion has a function of outputting a bias voltage to be supplied to a gate of the second transistor and a gate of the third transistor. One of a source and a drain of the first transistor is electrically connected to the gate of the second transistor and the gate of the third transistor. The first transistor is turned off when the bias voltage is supplied, and the first transistor is turned on when the supply of the bias voltage is stopped.