Patent classifications
H03D7/14
High performance receiver architecture and methods thereof
A user equipment (UE), receiver and method are generally described herein. The UE may include a mixer, a local oscillator (LO) and an analog-to-digital converter (ADC). The mixer may downconvert a differential radio frequency (RF) signal using LO signals and provide downconverted signals to the ADC. The mixer may provide decoupled lowpass filtering. The lowpass filter capacitors may retain charge when discharging is completed. For each differential signal, the mixer may have an input pullup resistor, first switches receiving the signal and driven by different LO signals, second switches receiving signals from the first switches such that connected pairs of switches may have driven by different LO signals, an ADC input resistor, charging capacitors each connected between first switches driven by the same LO signal, and grounding capacitors each connected to second switches associated with different RF signal outputs and driven by different LO signals.
Fractional mixer based tuner and tuning method
The application discloses a tuner and a method for tuning a signal. The tuner comprises: a sampling module, the sampling module being configured to receive an input signal and a set of control signals, sample the input signal under the control of the set of control signals and generate a sample signal; wherein each of the set of control signals has a control period equal to (N*T.sub.VCO), and the control periods of the set of control signals synchronize with each other; a set of weighting modules, wherein each of the set of weighting modules is configured to receive the set of sample signals and weight the received sample signals with a group of weighting factors to generate a group of weighted signals; and one or more summing modules, each summing module being configured to receive one group of weighted signals generated by one of the set of weighting modules and sum the group of weighted signals to output an output signal, wherein the output signal is the input signal being shifted by a predefined frequency f.sub.VCO*m.sub.k/N.
DIGITAL QUADRATURE MODULATOR AND SWITCHED-CAPACITOR ARRAY CIRCUIT
A digital quadrature modulator holds local oscillator circuitry configured to provide local oscillator signals, and local oscillator polarity logic circuitry configured to select an In-phase and a Quadrature local oscillator signal according to a sign bit of an In-phase control word and a sign bit of a Quadrature control word, respectively. The modulator holds a number of local oscillator control logic circuits, each configured to generate a conditioned signal by gating one or both of the selected local oscillator signals according to values of the In-phase control word and/or values of the Quadrature control word. The modulator has one or more sets of switched-capacitor units, where each unit has an output provided by an output capacitor, and where a signal at the input side of the output capacitor is controlled by a conditioned signal. The outputs of at least two of the switched-capacitor units are combined in a common node.
Switched-capacitor harmonic-reject mixer
A discrete-time harmonic rejection mixer, an input device, and methods for using the same are described herein. In one example, a discrete-time harmonic rejection mixer includes a switched-capacitor network and a switch controller. The switched-capacitor network includes first, second, and third switched capacitor sub-circuits, each including a pair of capacitors and a set of switches. The switch controller is coupled to the switched-capacitor network, and is configured to operate the sets of switches. More specifically, the switch controller is configured to operate the sets of switches in an out of phase manner to produce the harmonic rejection effect. Capacitance values for the first pair of capacitors are roughly equal to capacitance values for the third pair of capacitors. An input device, method, and harmonic rejection circuit exhibiting the above features are provided as examples.
CLOCK GENERATOR USING PASSIVE MIXER AND ASSOCIATED CLOCK GENERATING METHOD
A clock generator has a buffer stage circuit, a passive mixer, and a channel selecting circuit. The buffer stage circuit receives a plurality of first reference clocks having a same first frequency but different phases. The passive mixer receives the first reference clocks from the buffer stage circuit, receives a plurality of second reference clocks having a same second frequency but different phases, and mixes the first reference clocks and the second reference clocks to generate a mixer output, wherein the second frequency is different from the first frequency. The channel selecting circuit extracts a plurality of third reference clocks from the mixer output, wherein the third reference clocks have a same third frequency but different phases, and the third frequency is different from the first frequency and the second frequency.
Variable duty-cycle multi-standard mixer
An adjustable mixer is disclosed that is capable of operating in different modes in order to satisfy the mixing requirement of multiple radio access technologies (RATs). The adjustable mixer includes a LO signal generating portion and a mixing portion. Depending on the mixing requirements of the RAT, the adjustable mixer can operate in any one of multiple modes, each mode having a specific configuration for the LO signal generating portion and the mixing portion. The LO signal generating portion generates a LO signal having a particular duty cycle, depending on the selected mode, for use by the mixing portion. The mixing portion has an adjustable circuit configuration that can be dynamically reconfigured based on the selected mode, and which allows the mixing portion to successfully mix received signals using the corresponding LO signals generated by the LO signal generating portion.
Magnetoresistive mixer
A magnetoresistive mixer, comprising a spiral coil, a bridge-type magnetoresistive sensor and a magnetic shielding layer, wherein the spiral coil is located between the bridge-type magnetoresistive sensor and the magnetic shielding layer. Four tunnel magnetoresistive sensor units forming the bridge-type magnetoresistive sensor respectively contain N array-type magnetic tunnel junction rows. The magnetic tunnel junction rows are connected in series, parallel, or combination of series and parallel connections to form two port structures. The four tunnel magnetoresistive sensor units are respectively located in two regions of the spiral coil having opposite current directions, sensing axes of magnetic tunnel junctions are perpendicular to the current directions, and in addition, the distribution characteristics of magnetic fields in directions of the sensing axes of the tunnel magnetoresistive sensor units to the magnetic field in the two regions are opposite, and the distribution characteristics in a single region are the same. The first frequency signal is input through the two ends of the spiral coil, the second frequency signal is input between the power and -ground ports of the bridge-type magnetoresistive sensor, and mixing signals are output through a signal output end of the bridge-type magnetoresistive sensor. The magnetoresistive mixer has the characteristics of good linearity, good input signal isolation, and low power consumption.
Magnetoresistive mixer
A magnetoresistive mixer, comprising a spiral coil, a bridge-type magnetoresistive sensor and a magnetic shielding layer, wherein the spiral coil is located between the bridge-type magnetoresistive sensor and the magnetic shielding layer. Four tunnel magnetoresistive sensor units forming the bridge-type magnetoresistive sensor respectively contain N array-type magnetic tunnel junction rows. The magnetic tunnel junction rows are connected in series, parallel, or combination of series and parallel connections to form two port structures. The four tunnel magnetoresistive sensor units are respectively located in two regions of the spiral coil having opposite current directions, sensing axes of magnetic tunnel junctions are perpendicular to the current directions, and in addition, the distribution characteristics of magnetic fields in directions of the sensing axes of the tunnel magnetoresistive sensor units to the magnetic field in the two regions are opposite, and the distribution characteristics in a single region are the same. The first frequency signal is input through the two ends of the spiral coil, the second frequency signal is input between the power and -ground ports of the bridge-type magnetoresistive sensor, and mixing signals are output through a signal output end of the bridge-type magnetoresistive sensor. The magnetoresistive mixer has the characteristics of good linearity, good input signal isolation, and low power consumption.
Regenerative frequency divider
A regenerative frequency divider comprising an in-phase mixer circuit and a phase-shifted mixer circuit. At least one switching device of the in-phase mixer circuit is of a smaller scale than a corresponding switching device of the transconductance component of the in-phase mixer circuit. In some examples, at least one switching device within an input switching stage of the regenerative frequency divider forming part of the phase-shifted mixer circuit is of a smaller scale than a respective corresponding switching device within the input switching stage forming part of the in-phase mixer circuit. In some further examples, all switching devices within the phase-shifted mixer circuit are of a small scale than respective corresponding switching devices within the in-phase mixer circuit.
Signal mixing circuit device and receiver
A signal mixing circuit device and a receiver are disclosed, the signal mixing circuit device comprising first to fourth mixers, first and second signal amplifying circuits, a signal strength detector, a controller and an attenuator. A signal strength value for the output from the first signal amplifying circuit is detected using the signal strength detector. If the signal strength value is less than a first threshold, a high-gain path is initiated, so that noises respectively input to the first and second mixers together with local oscillator signals are eliminated by the fourth and third mixers respectively, thereby ensuring a high signal-to-noise ratio. If the signal strength value is greater than a second threshold, a low-gain path is initiated, which partially reuses the circuit of the high-gain path, thereby effectively reducing the overall circuit area and decreasing chip cost and power consumption.