Patent classifications
H03F1/08
Transceiver front-end with receiver branch matching network including integrated electrostatic discharge protection
Disclosed are embodiments of a transceiver front-end configured for a reduced noise figure (NF). Each of the embodiments includes an antenna, a transmitter branch and a receiver branch all connected to an input/output pad. The transmitter branch is coupled to the input/output pad (and thereby the antenna) by an impedance transformer. Only the receiver branch is selectively electrically connected to the input/output pad (and thereby the antenna) by a switch. A common matching network between the input/output pad and the switch provides both impedance matching and electrostatic discharge protection for the switch and the low noise amplifier, thereby reducing NF. Specific embodiments are disclosed for integration into specific technologies (e.g., fully depleted silicon-on-insulator (FDSOI) technology and fin-type field effect transistor (finFET) technology).
Cascode bias for comparator
A comparator having: a first transistor coupled to a first input terminal; a first current source coupled to the first transistor; a second transistor coupled to a second input terminal and coupled to the first current source; a third transistor coupled in series with the first transistor; a fourth transistor coupled in series with the second transistor; a fifth transistor coupled in series with the first transistor; a sixth transistor coupled in series with the second transistor; a seventh transistor coupled to the first input terminal and coupled as a source follower to the fifth transistor; and an eighth transistor coupled to the second input terminal and coupled as a source follower to the sixth transistor. The comparator also including a differential amplifier coupled to the first output terminal and coupled to the second output terminal.
AMPLIFIER
A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor. The capacitive trans-impedance amplifier is arranged to determine a voltage generated across the feed-back capacitor while the calibration switch is in the calibration state and to determine a capacitance value (C=Q/V) for the feed-back capacitor according to the value of the generated voltage (V) and the quantity of charge (Q).
AMPLIFIER
A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor. The capacitive trans-impedance amplifier is arranged to determine a voltage generated across the feed-back capacitor while the calibration switch is in the calibration state and to determine a capacitance value (C=Q/V) for the feed-back capacitor according to the value of the generated voltage (V) and the quantity of charge (Q).
Amplifier circuit with overshoot suppression
An amplifier circuit including an input amplifier, an output amplifier and a diode device is provided. The output amplifier includes a PMOSFET and an NMOSFET. The PMOSFET has a gate electrode serving as a first input end and a drain coupled to an output end. The NMOSFET has a gate electrode serving as a second input end and a drain coupled to the output end. The output amplifier outputs an output voltage at the output end, and is coupled to the input amplifier via at least one of the first and second input ends. The diode device is coupled between the output end and the at least one of the first and second input ends of the output amplifier. When a voltage difference between the output end and the at least one of the first and second input ends of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced.
Apparatus and methods for low noise amplifiers with mid-node impedance networks
Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.
Apparatus and methods for low noise amplifiers with mid-node impedance networks
Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.
OPERATIONAL AMPLIFIER BASED ON METAL-OXIDE TFT, CHIP, AND METHOD
Disclosed is an operational amplifier based on a metal-oxide TFT. The operational amplifier includes an auxiliary amplifier and a bootstrap gain-increasing amplifier. The auxiliary amplifier adopts a two-stage positive feedback structure, including a fifth transistor, a seventh transistor, an eleventh transistor, a first amplifying unit, and a second amplifying unit. A gate of the fifth transistor serves as an input end of the operational amplifier. The bootstrap gain-increasing amplifier includes two second circuits in mutual symmetry. Each of the second circuits includes a first transistor, a second transistor, and a current source unit with a bootstrap structure.
Reconfigurable optical receivers for extended maximum input signals
In optical receivers, extending the transimpedance amplifier's (TIA) dynamic range is a key to increasing the receiver's dynamic range, and therefore increase the channel capacity. Ideally, the TIA requires controllable gain, whereby the receiver can modify the characteristics of the TIA and/or the VGA to process high power incoming signals with a defined maximum distortion, and low power incoming signals with a defined maximum noise. A solution to the problem is to provide TIA's with reconfigurable feedback resistors, which are adjustable based on the level of power, e.g. current, generated by the photodetector, and variable load resistors, which are adjustable based on the change in impedance caused by the change in the feedback resistor.
High signal-to-noise ratio amplifier with multiple output modes
A multi-stage amplifier with a high signal-to-noise ratio is introduced. Multiple amplification stages are cascaded between an input terminal and an output terminal of the amplifier. A controller switches the output stage among the multiple amplification stages from a normal mode to an attenuation mode in response to the amplifier input being lower than the threshold. In the attenuation mode, the output stage provides an attenuation resistor coupled in series with the load resistor of the amplifier. Noise is successfully attenuated by the attenuation-mode output stage.