Circuitry for an optical receiver includes a photodiode for converting an optical signal into a photocurrent having an AC portion I.sub.pd(AC) and a DC portion I.sub.pd(DC). The circuitry includes a circuit element that is connected between the photodiode and the input to a Trans-Impedance Amplifier (TIA). Included in the circuit element is an AC bypass capacitor C.sub.bp and a sensor. In detail, the sensor may be either a current sensor or a voltage sensor. In either case, the sensor establishes a cancellation current for removing the DC portion I.sub.pd(DC) from the photocurrent while the AC bypass capacitor C.sub.bp shunts an AC portion I.sub.pd(AC) to ground. The result is that only an AC portion I.sub.pd(AC) of the optical signal is maintained for input into the TIA.

A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input.

A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.

The present invention introduces an arrangement for enhancing the performance of an electronic circuit comprising a phototransistor (Q). Either a common-collector or a common-emitter connected phototransistor (Q) has a main resistor (R.sub.L), and at least one external bias resistors (R.sub.L2, R.sub.L3, R.sub.L4), each in parallel to one another. The microcontroller may directly control the voltage outputs or act via respective switches (S1, S2) regarding each respective resistor. When the electronic circuit with the phototransistor (Q) is switched on, at least one of the external bias resistors (R.sub.L2, R.sub.L3, R.sub.L4) are switched on. The voltage output rise time is short, and when the bias has been set, the external bias resistor(s) are disconnected functionally. This means that during the actual measurement with the electric circuit, only the main resistor (R.sub.L) is used in the connection.

A transistor amplifier includes a group III-nitride based amplifier die including a gate terminal, a drain terminal, and a source terminal on a first surface of the amplifier die and an interconnect structure electrically bonded to the gate terminal, drain terminal and source terminal of the amplifier die on the first surface of the amplifier die and electrically bonded to an input path and output path of the transistor amplifier.

A variable current trans-impedance amplifier (TIA) for an ultrasound device is described. The TIA may be coupled to an ultrasonic transducer to amplify an output signal of the ultrasonic transducer representing an ultrasound signal received by the ultrasonic transducer. During acquisition of the ultrasound signal by the ultrasonic transducer, one or more current sources in the TIA may be varied.

An integrated circuit, comprising an amplifier comprising a pair of inputs configured to receive a differential signal, a first resistor, a second resistor, wherein the first resistor and the second resistor are coupled in series with each other and coupled to a first input of the pair of inputs, a third resistor, a fourth resistor, wherein the third resistor and the fourth resistor are coupled in series with each other and coupled to a second input of the pair of inputs, and a first capacitor comprising a first end coupled to a first point between the first resistor and the second resistor, and a second end coupled to a second point between the third resistor and the fourth resistor, a second capacitor disposed between the first input and an output of the amplifier; and a third capacitor disposed between the second input and the output.

Disclosed herein are transimpedance circuits, as well as related methods and devices. In some embodiments, a transimpedance circuit may include a current source bias terminal, a current source output terminal, and a transimpedance amplifier coupled to the current source output terminal, wherein voltage signals at the current source bias terminal are correlated with voltage signals at the current source output terminal. In some embodiments, the current source may be a photodiode.

Disclosed herein are transimpedance circuits, as well as related methods and devices. In some embodiments, a transimpedance circuit may include a current source bias terminal, a current source output terminal, and a transimpedance amplifier coupled to the current source output terminal, wherein voltage signals at the current source bias terminal are correlated with voltage signals at the current source output terminal. In some embodiments, the current source may be a photodiode.

A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor that supplies a bias current based on a first current which is a part of a control current to the first transistor; a current output element in which a current flowing therethrough increases in accordance with a rise in temperature; and a wiring portion including a plurality of metal layers that are electrically connected to an emitter of the first transistor and that are stacked one on top of another so as to oppose the semiconductor substrate. At least one metal layer among the plurality of metal layers extends so as to overlap an area extending from at least a part of a first disposition area in which the first transistor is disposed to a second disposition area in which the current output element is disposed in plan view of the semiconductor substrate.