The present application discloses an amplifier, including: a positive-end PMOS; a negative-end PMOS; a positive-end NMOS, having a drain coupled to a drain of the positive-end PMOS and outputting a positive-end output signal; a negative-end NMOS, having a drain coupled to a drain of the negative-end PMOS and outputting a negative-end output signal; a first resistor, coupled between a gate of the negative-end NMOS and a negative-end input signal; a second resistor, coupled between a gate of the negative-end NMOS and the positive-end output signal; a third resistor, coupled between a gate of the negative-end PMOS and the negative-end input signal; and a fourth resistor, coupled between a gate of the negative-end PMOS and the positive-end output signal.

Systems and methods including variable power amplifier bias impedance are disclosed. In one aspect, there is provided a power amplifier system including a bias circuit configured to receive a bias voltage and generate a bias signal and a power amplifier stage configured to receive an input radio frequency (RF) signal and generate an output RF signal. The power amplifier system may also include a bias impedance component operatively coupled between the bias circuit and the power amplifier stage. The bias impedance is component configured to receive a control signal and adjust an impedance value of the bias impedance component in response to the control signal.

Systems and methods including variable power amplifier bias impedance are disclosed. In one aspect, there is provided a power amplifier system including a bias circuit configured to receive a bias voltage and generate a bias signal and a power amplifier stage configured to receive an input radio frequency (RF) signal and generate an output RF signal. The power amplifier system may also include a bias impedance component operatively coupled between the bias circuit and the power amplifier stage. The bias impedance is component configured to receive a control signal and adjust an impedance value of the bias impedance component in response to the control signal.

The disclosure provides an improved transimpedance amplifier (TIA) that can operate at a higher bandwidth and lower noise compared to conventional TIAs. The TIA employs a data path with both feedback impedance and feedback capacitance for improved performance. The feedback impedance includes at least two resistors in series and at least one shunt capacitor, coupled between the at least two resistors, that helps to extend the circuit bandwidth and improve SNR at the same time. The capacitance value of the shunt capacitor can be selected based on both the bandwidth and noise. In one example, the TIA includes: (1) a biasing path, and (2) a data path, coupled to the biasing path, including multiple inverter stages and at least one feedback capacitance coupled across an even number of the multiple inverter stages. An optical receiver and a circuit having the TIA are also disclosed.

A new trans-impedance amplifier (TIA) with low noise is provided. The TIA may include an input stage and an output driving stage. The input stage may include a pair of input PMOS transistors, a pair of input NMOS transistors, and a pair of differential voltage input nodes. The output driving stage may include a pair of output circuits, each may include a first pair of PMOS and NMOS transistors electrically connected in parallel, a second pair of PMOS and NMOS transistors electrically connected in series, and a pair of capacitors electrically connected in series, which are electrically connected in parallel. The structure can lead to a reduced noise level of the TIA.

A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor. The capacitive trans-impedance amplifier is arranged to determine a voltage generated across the feed-back capacitor while the calibration switch is in the calibration state and to determine a capacitance value (C=Q/V) for the feed-back capacitor according to the value of the generated voltage (V) and the quantity of charge (Q).

A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor. The capacitive trans-impedance amplifier is arranged to determine a voltage generated across the feed-back capacitor while the calibration switch is in the calibration state and to determine a capacitance value (C=Q/V) for the feed-back capacitor according to the value of the generated voltage (V) and the quantity of charge (Q).

A calculation device includes a memory and a processor coupled to the memory. The processor is configured to; in an amplifier circuit including an input terminal to which a radio frequency signal is input, a transistor configured to amplify the input radio frequency signal, an output terminal from which the amplified radio frequency signal is output, and a matching circuit connected between the transistor and the output terminal, calculate a radio frequency characteristic of the amplifier circuit, if the calculated radio frequency characteristic of the amplifier circuit is a desired characteristic, calculate, at least one value of a current value and a voltage value at a predetermined portion within the equivalent circuit, and calculate, the deterioration degree of the electric characteristic of the transistor.

A trans-impedance amplifier (TIA) includes a first circuit, a second circuit, and a third circuit. Both the first circuit and the second circuit are coupled to a current source, an operational amplifier, and the third circuit. The first circuit is configured to receive a first current, provide a third voltage to the third circuit, perform shape filtering on the first current, and convert the shape filtered first current to a first voltage for output. The second circuit is configured to receive a second current, provide a fourth voltage to the third circuit, perform shape filtering on the second current, and convert the shape filtered second current to a second voltage for output. The third circuit is configured to cooperate with the first circuit and the second circuit in performing shape filtering. The operational amplifier is configured to provide a small-signal virtual ground point to the first circuit.

An amplifier includes a first stage and a second stage. The first stage is configured to amplify a received signal. The second stage is coupled to the first stage. The second stage includes a source follower and a compensation network. The source follower includes an input and an output. The compensation network is coupled to the input of the source follower and the output of the source follower. The compensation network is configured to modify a magnitude and phase response of the first stage based on a load capacitance coupled to the output of the source follower.