A bias circuit supplies bias voltage to a linear detector circuit. The bias circuit includes a transistor including a collector terminal, an emitter terminal, and a base terminal; a resistance element having one end connected to the collector terminal and the other end connected to a power line and the base terminal; a resistance element having one end connected to the emitter terminal; a transistor that switches between connection and disconnection between the resistance element and ground; collector voltage extended lines that transmit voltage corresponding to collector voltage as the bias voltage; and a transistor that is arranged on a path of one of the collector voltage extended lines and that switches between connection and disconnection between an output terminal of the linear detector circuit and the collector terminal.

A package for a current sense circuit may include a lead-frame having a shunt resistance configured to generate a shunt voltage, which can be used to measure a current through the lead-frame. The shunt resistance associated with the lead-frame may be highly variable with temperature, which can cause errors in the current measurement. Accordingly, a current sense circuit can include an amplifier with an input resistor having a composite temperature coefficient configured to match a lead-frame temperature coefficient so that an output of the amplifier is compensated to remove variations in the shunt resistance of the lead-frame due to temperature.

A fast-switching average power tracking (APT) power management integrated circuit (PMIC) is provided. The fast-switching APT PMIC includes a voltage amplifier(s) and an offset capacitor(s) having a small capacitance (e.g., between 10 nF and 200 nF). The voltage amplifier(s) is configured to generate an initial APT voltage(s) based on an APT target voltage(s) and the offset capacitor(s) is configured to raise the initial APT voltage(s) by an offset voltage(s) to generate an APT voltage(s). In embodiments disclosed herein, the offset voltage(s) is modulated based on the APT target voltage(s). Given the small capacitance of the offset capacitor(s), it is possible to adapt the offset voltage(s) fast enough to thereby change the APT voltage(s) within a predetermined temporal limit (e.g., 0.5 μs). As a result, the fast-switch APT PMIC can enable a power amplifier(s) to support dynamic power control with improved linearity and efficiency.

A power amplification circuit including: a power splitter which splits an input signal into a first signal and a second signal; a first carrier amplifier which amplifies the first signal to output a first amplified signal; a first peak amplifier which amplifies the second signal when a power level of the second signal is larger than or equal to a predetermined power level to output a second amplified signal; and a combiner which combines the first amplified signal and the second amplified signal, in which the first carrier amplifier and the first peak amplifier are provided to a same semiconductor substrate.

A power amplification circuit including: a power splitter which splits an input signal into a first signal and a second signal; a first carrier amplifier which amplifies the first signal to output a first amplified signal; a first peak amplifier which amplifies the second signal when a power level of the second signal is larger than or equal to a predetermined power level to output a second amplified signal; and a combiner which combines the first amplified signal and the second amplified signal, in which the first carrier amplifier and the first peak amplifier are provided to a same semiconductor substrate.

A current control circuit controls a bias current that is supplied to an amplifier transistor that amplifies a radio-frequency signal and includes a node, a constant current source circuit that supplies a first current to the node, and a variable current source circuit that supplies a second current to the node, based on a result of comparison between a potential of the node and a reference potential. The node outputs a control current including the first current and the second current for controlling the bias current.

A method for generating a constant current. The method can include receiving an input voltage at a voltage input connected to a resistor pair, the resistor pair including a first resistor and a second resistor, the first resistor having a positive temperature coefficient and the second resistor having a negative temperature coefficient. The first and second resistors can be configured such that the variability of resistance over temperature of the first resistor and the variability of resistance over temperature of the second resistor cancel to produce a zero temperature coefficient for the resistor pair. The method can further include applying the input voltage to the resistor pair to generate a current with a zero temperature coefficient.

A method for generating a constant current. The method can include receiving an input voltage at a voltage input connected to a resistor pair, the resistor pair including a first resistor and a second resistor, the first resistor having a positive temperature coefficient and the second resistor having a negative temperature coefficient. The first and second resistors can be configured such that the variability of resistance over temperature of the first resistor and the variability of resistance over temperature of the second resistor cancel to produce a zero temperature coefficient for the resistor pair. The method can further include applying the input voltage to the resistor pair to generate a current with a zero temperature coefficient.

Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.