A low noise amplifier topology can achieve very low noise figure by applying multiple magnetic coupling between gate matching inductors and source degeneration inductor of a field effect transistor. The resulting low noise amplifier has smaller inductors, which can have lower thermal noise contribution, and can maintain good gain and linearity performance. For example, a low noise amplifier includes a first inductor to receive an input; a second inductor coupled to the first inductor in series; a first field effect transistor device whose gate receives a signal from the second inductor; and a third inductor coupled to a source of the first field effect transistor device, where the third inductor is magnetically positively coupled to the first inductor and the second inductor.

An in-band extraction unit is configured to extract an in-band from an output signal. An out-band extraction unit is configured to extract at least one pair of out-bands including a low frequency side out-band and a high frequency side out-band from the output signal. An ADC is configured to convert the extracted in-band and out-bands to digital signals. A signal processing unit is configured to process information included in the digital signals converted by the analog to digital converter and adjust an operation of predistorting an input baseband digital signal to generate the output signal.

Systems, devices, and methods related to using model architecture search for hardware configuration are provided. An example apparatus includes an input node to receive an input signal; a pool of processing units to perform one or more arithmetic operations and one or more signal selection operations, wherein each of the processing units in the pool is associated with at least one parameterized model corresponding to a data transformation operation; and a control block to configure, based on a first parameterized model, a first subset of the processing units in the pool, where the first subset of the processing units processes the input signal to generate a first signal.

Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.

Systems and methods are described to perform wireless communication. The device includes a pre-distortion circuit configured to pre-distort an input signal based on a parameter set including a plurality of coefficients and generate a pre-distorted signal, a power amplifier configured to amplify the pre-distorted signal and generate an output signal, and a parameter obtaining circuit configured to perform an iterative approximation operation based on the output signal and the pre-distorted signal, which change over time, according to an indirect training structure configured to minimize a difference between an intermediate signal obtained based on the output signal and the pre-distorted signal, and obtain the parameter set.

This application describes time-encoding modulator circuitry (200), and in particular a PWM modulator suitable for use for a class-D amplifier. A forward signal path receives a digital input signal (Din) and outputs an output PWM signal (Sout) and includes a first PWM modulator (101). A feedback path provides feedback to an input of the first PWM modulator (101). The feedback path includes an ADC (203) which receive a first PWM signal (Sa) derived from the output PWM signal. The ADC (203) includes a second PWM modulator (401) which generates a second PWM signal (Sb) based on the first PWM signal. A controller (201) controls the second PWM modulator such that a PWM carrier of the second PWM signal is phase and frequency matched to a PWM carrier of the output PWM signal.

A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.

A compensation circuit module includes a variable resistor, a detection component and a control component. A detection end of the detection component is connected with a DC blocking capacitor of the power amplifier and is configured to detect a voltage swing of an input signal of the DC blocking capacitor. The control component is connected with the detection component and is configured to output a control signal according to the input signal detected by the detection component. The variable resistor is connected with the output end of the control component and is configured to change the resistance connected to the power amplifier according to the control signal, and the resistance of the variable resistor connected to the power amplifier is configured to constitute the feedback resistance of the power amplifier.

A method of determining filter coefficients of an equalizer circuit for equalizing a non-linear electronic system is described. The equalizer circuit includes a Volterra filter circuit. Further, an equalizer circuit for equalizing a non-linear electronic system and an electronic device are described.

A method of determining filter coefficients of an equalizer circuit for equalizing a non-linear electronic system is described. The equalizer circuit includes a Volterra filter circuit. Further, an equalizer circuit for equalizing a non-linear electronic system and an electronic device are described.