An amplifier includes: a high-frequency input terminal; a high-frequency output terminal; a multistage circuit provided between the high-frequency input terminal and the high-frequency output terminal and including two or more amplifiers and connected in series, each amplifier including an input matching circuit, a transistor, and an output matching circuit; a stabilizing circuit provided in at least two of the amplifiers and including a bandpass filter and a resistor connected in parallel; and a band-rejection filter provided between the at least two of amplifiers and eliminating a frequency lower than an operation frequency of the amplifier. The stabilizing circuit and the band-rejection filter are provided between an output terminal of the transistor of the amplifier and the output matching circuit or provided in the output matching circuit. The closer to the high-frequency input terminal the bandpass filter is, the lower a resonance frequency of the bandpass filter is.

A multi-stage amplifier includes a first stage comprising a first common-source amplifier, a first inductive load network comprising a serial connection of a first load resistor and a first load inductor, and a first source network configured to receive a first signal and output a first load signal, and a first inter-stage inductor configured to couple the first load signal to a second signal; and a second stage comprising a second common-source amplifier, a second inductive load network comprising a serial connection of a second load resistor and a second load inductor, and a second source network configured to receive the second signal and output a second load signal, and a second inter-stage inductor configured to couple the second load signal to a third signal, wherein the first load inductor and the second load inductor are laid out to enhance an inter-stage inductive coupling.

A multi-stage amplifier includes a first stage comprising a first common-source amplifier, a first inductive load network comprising a serial connection of a first load resistor and a first load inductor, and a first source network configured to receive a first signal and output a first load signal, and a first inter-stage inductor configured to couple the first load signal to a second signal; and a second stage comprising a second common-source amplifier, a second inductive load network comprising a serial connection of a second load resistor and a second load inductor, and a second source network configured to receive the second signal and output a second load signal, and a second inter-stage inductor configured to couple the second load signal to a third signal, wherein the first load inductor and the second load inductor are laid out to enhance an inter-stage inductive coupling.

Various examples are directed to a frequency-compensated amplifier circuit comprising a first multi-stage amplifier comprising a first amplifier input node, a first amplifier output node, and a first amplifier intermediate node. A first feedback path between the first amplifier input node and the first amplifier output node comprises a feedback resistance. A second feedback path between the first amplifier output node and the first amplifier intermediate node comprises a first capacitor and a portion of the feedback resistance. A first switch circuit may be electrically coupled to the first capacitor and to the feedback resistance. The first switch circuit may have a first state in which the first capacitor is coupled to a first tap point of the feedback resistance and the portion of the feedback resistance has a first value. The first switch circuit may also have a second state in which the first capacitor is coupled to a second tap point of the feedback resistance and the portion of the feedback resistance has a second value different than the first value.

Various examples are directed to a frequency-compensated amplifier circuit comprising a first multi-stage amplifier comprising a first amplifier input node, a first amplifier output node, and a first amplifier intermediate node. A first feedback path between the first amplifier input node and the first amplifier output node comprises a feedback resistance. A second feedback path between the first amplifier output node and the first amplifier intermediate node comprises a first capacitor and a portion of the feedback resistance. A first switch circuit may be electrically coupled to the first capacitor and to the feedback resistance. The first switch circuit may have a first state in which the first capacitor is coupled to a first tap point of the feedback resistance and the portion of the feedback resistance has a first value. The first switch circuit may also have a second state in which the first capacitor is coupled to a second tap point of the feedback resistance and the portion of the feedback resistance has a second value different than the first value.

A tunable vector recombination amplifier comprises an input, an output, first and second amplifier circuit paths each including a respective phase shifter to receive a respective input signal from the input and to apply a respective phase shift to produce a respective phase-shifted signal, a respective interstage impedance matching network, and a respective amplifier connected between the respective phase shifter and interstage impedance matching network to receive and amplify the respective phase-shifted signal to produce a respective amplified signal, first and second controllable DC voltage sources each coupled to a respective amplifier and configured to provide a respective supply voltage to the respective amplifier, values of the supply voltages being independently controllable, and an output amplifier stage to receive, amplify, and vectorially combine the amplified signals to produce a combined signal having a specified phase determined by the phase shifts and supply-voltage values and a specified amplitude at the output.

A transmitting and receiving device having a module (GSZ) with a configurable HF high-power amplifier (HPA) that includes a main power amplifier (DM) with a main amplifier core and at least one peak power amplifier (DP1) having an auxiliary amplifier core. A switching element connected to inputs of the main power amplifier and the at least one peak power amplifier is connected to a digital input signal divider (ET) having a plurality of outputs and an output combiner (C) is connected to outputs of the amplifier cores for the main power amplifier and the at least one peak power amplifier. A multi-harmonic transformation line (LAH) is connected at the amplifier core output of the main power amplifier and at the amplifier core output of the at least one peak power amplifier, and a circulator (Z1) is connected to the output of the output combiner or an impedance converter (AN1).

An amplifier circuit includes a constant current circuit for outputting a constant current signal at its output terminal, an operational amplifier for outputting an amplified control signal based on the first voltage signal, and an amplified voltage output circuit for outputting a second voltage signal based on both the constant current signal and the amplified control signal. The constant current circuit has a light-emitting device having one end supplied with the constant voltage signal and another end supplied with ground potential, a light responsive electricity generating device for outputting a drive signal in response to light emitted by the light-emitting device, a first transistor generating the constant current signal based on the amplified voltage signal applied thereto and to output the constant current signal; and a current control circuit for detecting the value of the constant current signal and controlling the supply of the drive signal based on the detection.

A current feedback amplifier (CFA). The CFA includes a common-gate input stage, a biasing circuitry, and a differential pair coupled in parallel between the supply voltage node and the reference voltage node. The common-gate input stage amplifies an input signal received at an input node and supplies it to a gate of the complementary transistors of the differential pair. The biasing circuitry supplies a bias voltage to a gate of the transistors of the common-gate input stage. The input node of the common-gate input stage and a node between the complementary transistors in the first path of the differential pair are shorted.

A device, system and method for a wideband low noise amplifier is provided. The device may include a main amplifier and an error amplifier. In each amplifier is a phase inverter configured to invert the incoming signal. Additionally, rather than being formed from discrete components, the conductors of this wideband low noise amplifier are formed from microwave monolithic integrated circuits to provide for greater efficiency, which enables the low noise amplifier to operate in wideband rather than narrowband. A method of using the same is also provided.