Various embodiments of the invention provide for an AC-coupling method and systems that utilize a nested loop circuit to generate a differential mode output that facilitates an offset compensation and a common mode output that facilitates DC-biasing of an active circuit. In embodiments, the nested loop circuit comprises a differential amplifier and a differential mode loop that generates a differential mode output and a common mode loop that uses a common mode voltage and a reference voltage to generate the common mode output.

An example current mirror arrangement includes a current mirror circuit, configured to receive an input current signal at an input transistor Q1 and output a mirrored signal at an output transistor Q2. The arrangement further includes a semi-cascoding circuit that includes transistors Q3, Q4, and a two-terminal passive network. The transistor Q3 is coupled to, and forms a cascode with, the output transistor Q2. The transistor Q4 is coupled to the transistor Q3. The base/gate of the transistor Q3 is coupled to a bias voltage Vref, and the base/gate of the transistor Q4 is coupled to a bias voltage Vref1 via the two-terminal passive network. Nonlinearity of the output current from such a current mirror arrangement may be reduced by selecting appropriate impedance of the two-terminal passive network and selecting appropriate bias voltages Vref and Vref1.

Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.

Apparatus and methods for a no-load-modulation power amplifier are described. No-load-modulation power amplifiers can comprise multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see essentially no modulation of its load between the power amplifier's fully-on and fully backed-off states. The power amplifiers can operate in symmetric and asymmetric modes. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained. Further improvements can be obtained by combining signals from the amplifiers with hybrid couplers.

A high-power, high-frequency radio frequency power amplifier includes an output stage and a single-phase driver. The output stage is arranged in a Class-D amplifier configuration and includes a first depletion mode field effect transistor (FET), a second depletion mode FET, and a bootstrap path that couples the output of the output stage to the gate of the second FET. The first and second depletion mode FETs are switched out-of-phase and between fully-ON and fully-OFF states, under the direction of the single-phase driver. The single-phase driver directly controls the ON/OFF state of the first depletion mode FET and provides a discharge path through which the input gate capacitor of the second depletion mode FET in the output stage can discharge to turn OFF the second depletion mode FET. The bootstrap path provides a current path through which the input gate capacitor of the second depletion mode FET can charge to turn the second depletion mode FET ON.

A high-power, high-frequency radio frequency power amplifier includes an output stage and a single-phase driver. The output stage is arranged in a Class-D amplifier configuration and includes a first depletion mode field effect transistor (FET), a second depletion mode FET, and a bootstrap path that couples the output of the output stage to the gate of the second FET. The first and second depletion mode FETs are switched out-of-phase and between fully-ON and fully-OFF states, under the direction of the single-phase driver. The single-phase driver directly controls the ON/OFF state of the first depletion mode FET and provides a discharge path through which the input gate capacitor of the second depletion mode FET in the output stage can discharge to turn OFF the second depletion mode FET. The bootstrap path provides a current path through which the input gate capacitor of the second depletion mode FET can charge to turn the second depletion mode FET ON.

A wideband power amplifier (PA) linearization technique is proposed. A current interpolation technique is proposed to linearize power amplifiers over a wide bandwidth. The wideband power amplifier linearization technique employs a novel transconductance Gm linearizer using a current interpolation technique that achieves improvement in the third order intermodulation over wide bandwidth for a sub-micron CMOS differential power amplifier. By using a small amount of compensating bias into an opposite phase differential pair, linearization over wide bandwidth is achieved and can be optimized by adjusting the compensating bias.

A wideband power amplifier (PA) linearization technique is proposed. A current interpolation technique is proposed to linearize power amplifiers over a wide bandwidth. The wideband power amplifier linearization technique employs a novel transconductance Gm linearizer using a current interpolation technique that achieves improvement in the third order intermodulation over wide bandwidth for a sub-micron CMOS differential power amplifier. By using a small amount of compensating bias into an opposite phase differential pair, linearization over wide bandwidth is achieved and can be optimized by adjusting the compensating bias.

A system to program parameters of one or more stages of a transimpedance amplifier (TIA) in an optical sub-assembly (e.g. TO-can package) is disclosed. With this invention, users have the option/flexibility to discretely program any of the stages of the TIA after production of the sub-assembly, i.e. they can still change the TIA settings once the TIA has been installed in a system and the system is in use.

A system to program parameters of one or more stages of a transimpedance amplifier (TIA) in an optical sub-assembly (e.g. TO-can package) is disclosed. With this invention, users have the option/flexibility to discretely program any of the stages of the TIA after production of the sub-assembly, i.e. they can still change the TIA settings once the TIA has been installed in a system and the system is in use.