A wideband RF choke circuit includes an input, first and second nodes, and a splitting means coupled between the input, first node, and second node. A first all-pass filter and a first line AC blocker are coupled between the input and the splitting means. Second and third all-pass filters, and second and third line AC blockers, are coupled between the splitting means and the first and second nodes, respectively. A first RF choke has a first end, coupled to the first all-pass filter, and a second end. A second RF choke has a first end, coupled to the second end of the first RF choke, and a second end coupled to the second all-pass filter. A third RF choke has a first end, coupled to the second end of the first RF choke, and a second end coupled to the third all-pass filter.

A wideband RF choke circuit includes an input, first and second nodes, and a splitting means coupled between the input, first node, and second node. A first all-pass filter and a first line AC blocker are coupled between the input and the splitting means. Second and third all-pass filters, and second and third line AC blockers, are coupled between the splitting means and the first and second nodes, respectively. A first RF choke has a first end, coupled to the first all-pass filter, and a second end. A second RF choke has a first end, coupled to the second end of the first RF choke, and a second end coupled to the second all-pass filter. A third RF choke has a first end, coupled to the second end of the first RF choke, and a second end coupled to the third all-pass filter.

Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.

Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.

Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.

A wide band directional coupler is disclosed. The coupler includes a main transmission line connected between an input port and an output port; and a coupling transmission line having a first length and connected between a coupling port and an isolation port, wherein the coupling transmission line is coupled to the main transmission line through a coupling capacitive connection and a mutual inductive connection, wherein at least a distance between the main transmission line and the coupling transmission line varies along the first length of the coupling transmission line such that any one of a capacitance value of the capacitive connection and an inductance value of the inductive connection is characterized by a relatively low value, wherein a coupling factor of the wide band directional couple remains substantially constant throughout an operating frequency band of the wide band directional coupler.

Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.

Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.

Methods and systems for accurate gain adjustment of a transimpedance amplifier using a dual replica and servo loop is disclosed and may include, in a transimpedance amplifier (TIA) circuit comprising a first TIA, a second TIA, and a third TIA, each comprising a configurable feedback impedance, and a control loop, where the control loop comprises a gain stage with inputs coupled to outputs of the first and second TIAs and an output coupled to the configurable feedback impedance of the second and third TIAs: configuring a gain level of the first TIA by configuring its feedback impedance, configuring a gain level of the third TIA by configuring a reference current applied to an input of the first TIA, and amplifying a received electrical signal to generate an output voltage utilizing the third TIA. The reference current may generate a reference voltage at one of the inputs of the gain stage.

Methods and systems for accurate gain adjustment of a transimpedance amplifier using a dual replica and servo loop is disclosed and may include, in a transimpedance amplifier (TIA) circuit comprising a first TIA, a second TIA, and a third TIA, each comprising a configurable feedback impedance, and a control loop, where the control loop comprises a gain stage with inputs coupled to outputs of the first and second TIAs and an output coupled to the configurable feedback impedance of the second and third TIAs: configuring a gain level of the first TIA by configuring its feedback impedance, configuring a gain level of the third TIA by configuring a reference current applied to an input of the first TIA, and amplifying a received electrical signal to generate an output voltage utilizing the third TIA. The reference current may generate a reference voltage at one of the inputs of the gain stage.