An outphasing amplifier includes a first amplifier configured to amplify a first signal, a second amplifier configured to amplify a second signal of which a phase difference from the first signal changes, and a synthesizer that has a first transmission line through which a third signal output from the first amplifier passes, a second transmission line through which a fourth signal output from the second amplifier passes, a first coupling circuit that is separately provided from the first transmission line and is coupled to the first transmission line, a second coupling circuit that is separately provided from the second transmission line and coupled to the second transmission line, and a node that synthesizes the third signal having passed through the first transmission line and the fourth signal having passed through the second transmission line.

Aspects of the disclosure relate to devices, wireless communication apparatuses, methods, and circuitry implementing a low noise amplifier (LNA) with phase-shifting circuitry to achieve a continuous phase at the output of the LNA. One aspect is an amplifier including a high gain active path comprising active circuitry, and a low gain path comprising passive circuitry and phase-shifting circuitry. In one or more aspects, the phase-shifting circuitry is configured to shift a phase of an input signal within the low gain path such that the phase of an output signal outputted from the low gain path approximately matches a phase of an output signal outputted from the high gain active path. In at least one aspect, a gain of the high gain active path is higher than a gain of the low gain passive path.

Technology is disclosed that systematically improves the noise figure (NF) on the receive path of front end architectures. The disclosed technologies tune the elements of the receive path in concert with one another to achieve superior or optimal NF performance. This may occur even where the NF performance of individual components is sub-optimal because it is the combination of the components that is tailored to provide superior or optimal NF performance. The disclosed technologies account for trade-offs in performance that arise when tuning individual components on the receive path, taking a holistic approach to the design of the receive path rather than focusing on optimizing individual elements or selected combinations of elements on the receive path.

Technology is disclosed that systematically improves the noise figure (NF) on the receive path of front end architectures. The disclosed technologies tune the elements of the receive path in concert with one another to achieve superior or optimal NF performance. This may occur even where the NF performance of individual components is sub-optimal because it is the combination of the components that is tailored to provide superior or optimal NF performance. The disclosed technologies account for trade-offs in performance that arise when tuning individual components on the receive path, taking a holistic approach to the design of the receive path rather than focusing on optimizing individual elements or selected combinations of elements on the receive path.

A power amplification circuit can include an input impedance matching circuit associated with one or more frequency bands of a plurality of frequency bands. The power amplification circuit can include a transistor with respective input coupled to an output of the input impedance matching circuit. The power amplification circuit can include a plurality of output impedance matching circuits. Each output impedance matching circuit can be associated with a respective frequency band of the plurality of frequency bands. The power amplification circuit can include a single pole multi-throw (SPMT) switch having an input terminal connected to an output of the transistor and a plurality of output terminals. Each output terminal of the SPMT switch can be connected to a corresponding output impedance matching circuit of the plurality of output impedance matching circuits.

A power amplification circuit can include an input impedance matching circuit associated with one or more frequency bands of a plurality of frequency bands. The power amplification circuit can include a transistor with respective input coupled to an output of the input impedance matching circuit. The power amplification circuit can include a plurality of output impedance matching circuits. Each output impedance matching circuit can be associated with a respective frequency band of the plurality of frequency bands. The power amplification circuit can include a single pole multi-throw (SPMT) switch having an input terminal connected to an output of the transistor and a plurality of output terminals. Each output terminal of the SPMT switch can be connected to a corresponding output impedance matching circuit of the plurality of output impedance matching circuits.

Systems and methods for a tunable impedance are provided. A tunable impedance includes a transistor assembly having two terminals and a control input. The transistor assembly includes one or more transistors electrically connected between the two terminals to provide a first impedance between the two terminals, based upon a control signal. One or more replica transistors react to the control signal in a similar fashion as the transistor assembly, to provide a replica impedance based upon the control signal. A control circuit is configured to generate the control signal based upon a voltage across the replica transistor(s) and/or a current through the replica transistor(s).

Systems and methods for a tunable impedance are provided. A tunable impedance includes a transistor assembly having two terminals and a control input. The transistor assembly includes one or more transistors electrically connected between the two terminals to provide a first impedance between the two terminals, based upon a control signal. One or more replica transistors react to the control signal in a similar fashion as the transistor assembly, to provide a replica impedance based upon the control signal. A control circuit is configured to generate the control signal based upon a voltage across the replica transistor(s) and/or a current through the replica transistor(s).

Apparatus and methods for a low-load-modulation power amplifier are described. Low-load-modulation power amplifiers can include multiple amplifiers connected in parallel to amplify a signal that has been divided into parallel circuit branches. One of the amplifiers can operate as a main amplifier in a first amplification class and the remaining amplifiers can operate as peaking amplifiers in a second amplification class. The main amplifier can see low modulation of its load between the power amplifier's fully-on and fully backed-off states. Improvements in bandwidth and drain efficiency over conventional Doherty amplifiers are obtained.

Aspects of this disclosure relate to an acoustic wave resonator with transverse mode suppression. The acoustic wave resonator can include a piezoelectric layer, an interdigital transducer electrode, a temperature compensation layer, and a mass loading strip. The mass loading strip can be a conductive strip. The mass loading strip can overlap edge portions of fingers of the interdigital transducer electrode. A layer of the mass loading strip can have a density that is at least as high as a density of a material of the interdigital transducer electrode. The material of the interdigital transducer can impact acoustic properties of the acoustic wave resonator.