Patent classifications
H03F1/56
Radio frequency amplifier implementing an input baseband enhancement circuit and a process of implementing the same
An amplifier includes an input matching network; at least one transistor; an input lead coupled to the at least one transistor; a ground terminal coupled to the transistor; an output lead coupled to the at least one transistor; an output matching circuit coupled to the output lead and to the at least one transistor; and a baseband impedance enhancement circuit having at least one reactive element coupled to the input matching network. The baseband impedance enhancement circuit is configured to reduce resonances of a baseband termination.
Power amplifier with a power transistor and an electrostatic discharge protection circuit on separate substrates
An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.
Termination circuits and attenuation methods thereof
The present invention is directed to communication systems and electrical circuits. According to an embodiment, the present invention provides a termination circuit that includes an inductor network. The inductor network is coupled to a termination resistor and a capacitor network, which includes a first capacitor and a second capacitor. The termination resistor, the first capacitor, and the second capacitor are adjustable, and they affect attenuation of the termination circuit. There are other embodiments as well.
STABILITY IN POWER AMPLIFIERS UNDER HIGH IN-BAND VOLTAGE STANDING WAVE RATIO CONDITION
In some embodiments, stability in power amplifiers can be achieved under high in-band voltage standing wave ratio condition, with an amplifier circuit that includes an amplifier having a first stage and a second stage, with each stage including an input and an output, such that the output of the first stage is coupled to the input of the second stage. The amplifier circuit further includes a stabilizing circuit implemented on the input side of the second stage and configured to provide stability in operation of the amplifier under a high in-band voltage standing wave ratio condition.
STABILITY IN POWER AMPLIFIERS UNDER HIGH IN-BAND VOLTAGE STANDING WAVE RATIO CONDITION
In some embodiments, stability in power amplifiers can be achieved under high in-band voltage standing wave ratio condition, with an amplifier circuit that includes an amplifier having a first stage and a second stage, with each stage including an input and an output, such that the output of the first stage is coupled to the input of the second stage. The amplifier circuit further includes a stabilizing circuit implemented on the input side of the second stage and configured to provide stability in operation of the amplifier under a high in-band voltage standing wave ratio condition.
Matching circuit and communication device
A matching circuit includes first and second ports, an autotransformer, and first and second capacitors. The autotransformer includes a first terminal coupled to a first port, a second terminal coupled to a second port, and a common terminal coupled to a reference potential, and includes a series parasitic inductor and a parallel parasitic inductor. The first capacitor is coupled in shunt to the second terminal, and defines a low pass filter together with the series parasitic inductor. The second capacitor is coupled in series between the first port and the first terminal, and defines a high pass filter together with the parallel parasitic inductor.
Power amplifier circuit
A power amplifier circuit includes a power amplifier including a first transistor having a first terminal connected to a reference potential, a second terminal to which a first current and a radio-frequency signal are input, and a third terminal connected to a first power supply potential via a first inductor; a capacitor connected to the third terminal of the first transistor; a second transistor including a first terminal connected to the capacitor and the reference potential via a second inductor, a second terminal to which a second current is input and is connected to the reference potential, and a third terminal connected to the first power supply potential via a third inductor and outputs signal; and an adjustment circuit that outputs a third current corresponding to the first power supply potential or a second power supply potential to the second terminal of the second transistor.
BIDIRECTIONAL POWER TRANSFER SYSTEM, METHOD OF OPERATING THE SAME, AND WIRELESS POWER SYSTEM
A bidirectional wireless power transfer system for transferring power comprises a power stage electrically connected to a transceiver element for an electric field and/or a magnetic field, and for extracting power from a generated electric field and/or a generated magnetic field. The power stage is for inverting an inputted power signal and for rectifying a received power signal. The system further comprises a trigger circuit for synchronizing wireless power transfer; and a clock generator for generating a clock signal. The system further comprises a switching element electrically connected to the power stage, and selectively electrically connected to the trigger circuit and the clock generator, such that: when the switching element electrically connects the clock generator to the power stage, the transceiver element is configured to transfer power by generating an electric field and/or a magnetic field, and when the switching element electrically connects the trigger circuit to the power stage, the transceiver element is configured to extract power from a generated electric field and/or a generated magnetic field.
DIGITAL AUDIO POWER AMPLIFIER AND POWER AMPLIFIER LOOP
Disclosed are a digital audio power amplifier and a power amplifier loop. The power amplifier loop comprises an operational amplifier U1, a capacitor C1, a power amplifier output stage, a resistor R1, a resistor R2 and a noise control unit, wherein an inverting input end of the operational amplifier U1 is respectively connected to one end of the capacitor C1, one end of the noise control unit and an output end of a preceding DAC current source; an output end of the operational amplifier U1 is respectively connected to a control end of the power amplifier output stage and the other end of the capacitor C1; an output end of the power amplifier output stage is successively grounded by means of the resistors R1, R2; the other end of the noise control unit is connected to a connection point between the resistors R1, R2; the resistance values of the resistors R1, R2 are set to satisfy R1/R2=(N−2)/2, where N>2; the reference voltage of the operational amplifier U1 is equal to PVDD/N, with PVDD being a power supply voltage of the power amplifier output stage; and the noise control unit is a resistor module. The present application ensures the normal operation of the digital audio power amplifier.
MULTI-FREQUENCY LOW NOISE AMPLIFIER
A multi-frequency low noise amplifier includes an input matching network, an amplifying circuit and an output matching network. The input matching network includes a first out-of-band rejection circuit and a first frequency band selection circuit. The output matching network includes a second out-of-band rejection circuit and a second frequency band selection circuit. The first out-of-band rejection circuit can reject signal of any frequency band in the radio frequency signals so that signals of the remaining frequency bands can pass through. The first frequency band selection circuit can screen out the signals of reference frequency spots from the remaining frequency bands. The second frequency band selection circuit can screen out the signals of partial frequency spots from the amplified signals of reference frequency spots. The second out-of-band rejection circuit can reject the signal of any frequency spot in the signals of partial frequency spots.