The disclosure provides a voltage control device for controlling supply voltages of a power amplifier (PA). The voltage control device includes a first processing circuit to provide a first supply voltage to at least one driving stage amplifier of the PA, and a second processing circuit to provide a second supply voltage to an output stage amplifier of the PA. The first supply voltage is generated according to an average-power-tracking (APT) mechanism related to an average power level of a radio frequency (RF) signal transmitted by the PA.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

A high-frequency 5 measurement method includes generating a test signal (TS), which is a sine-wave signal having a predetermined frequency, in which a period (τ) during which the power level is at a first power level and a period (T-τ) during which the power level is at a second power level lower than the first power level 10 are periodically repeated, inputting the test signal (TS) to a device under test (10) as an input signal, and measuring the difference between an output signal (OUT) of the device under test (10) and an ideal value of the output signal (OUT).

An object is to provide a method and a system of adjusting a power amplifier which makes it possible to adjust a linearizer using signals of two carriers by the same power, to reduce the influence of the non-linearity on a multicarrier signal compared with the conventional. A method of adjusting a power amplifier, the power amplifier including a linearizer to reduce an intermodulation caused by non-linearity of the power amplifier, includes: inputting two signals generated by a signal generator into the power amplifier; measuring power of each order of first intermodulations of the two signals output from the power amplifier; calculating a power sum of second intermodulations by the plurality of signals using the measured power of each order of the first intermodulations; and adjusting the linearizer so that the power sum of the second intermodulations by the plurality of signals takes a minimum value or at most a predetermined value.

A working state adjustment method is applied to a terminal. A power amplifier (PA) is arranged on the terminal. The method includes: determining a target channel bandwidth in which the terminal works; determining a target working state in which the PA works among optional working states according to the target channel bandwidth, in which the optional working states correspond to at least two types of working modes respectively; and adjusting the PA to work in the target working state.

An electronic device may include wireless circuitry with processor circuitry, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as low noise amplifier circuitry for amplifying received radio-frequency signals. The amplifier circuitry may include an amplifier having an input and an output, an adjustable load component coupled to the input, and an adjustable feedback component coupled across the input and output. A control circuit may simultaneously adjust the load and feedback components to tune the gain of the amplifier circuitry while maintaining the input resistance at a desired target level. The load and feedback components can be the same or different types of adjustable passive components.

A full-bridge class-D amplifier circuit comprises first through fourth power devices. First conduction terminals of the first and third power devices are coupled to a first power supply voltage, and second conduction terminals of the second and fourth power devices are coupled to a second power supply voltage. A second conduction terminal of the first power device and a first conduction terminal of the second power device are coupled to a first amplifier output. A second conduction terminal of the third power device and a first conduction terminal of the fourth power device are coupled to a second amplifier output. Left and right driver devices respectively disposed adjacent to left and right sides of the first power device have outputs respectively coupled to left and right control terminals respectively disposed on the left and right sides of the first power device.

An amplifier circuit structure can include an amplifier located in a main path, and a first switch located in a bypass. One end of a second switch is a signal output end of the amplifier circuit structure, and the other end of the second switch is configured to selectively connect to a signal output end of the bypass or a signal output end of the main path. The first and second switches are configured to control their respective operating states when a first instruction is received, such that the main path is connected to the signal input end and the signal output end of the amplifier circuit structure; and to control their respective operating states when a second instruction is received, such that the bypass is connected to the signal input end of the amplifier circuit structure and the signal output end of the amplifier circuit structure.

The integrated circuit includes a power amplifier intended to provide a signal in a fundamental frequency band, an antenna, and a matching and filtering network having a first section, a second section, and a third section. The three sections include LC arrangements configured to have an impedance matched to the power amplifier's output in the fundamental frequency band. The LC arrangements of the first section and the second section are configured to have resonant frequencies adapted to attenuate the harmonic frequency bands of the fundamental frequency band.