A differential input stage of a circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor. Drains of the first and third transistors couple together at a first node, and drains of the second and fourth transistors couple together at a second node. A first slew boost circuit includes a fifth transistor and a first current mirror. A gate of the fifth transistor couples to the second node. A source of the fifth transistor couples to the first node. The first current mirror couples to the fifth transistor and to the second node. A second slew boost circuit includes a sixth transistor and a second current mirror. A gate of the sixth transistor couples to the first node. A source of the sixth transistor couples to the second node. The second current mirror couples to the sixth transistor and to the first node.

The present invention relates to an amplification device (10) of an input signal comprising: a first amplification stage (12), a second amplification stage (14), each amplification stage (12, 14) comprising: a switching circuit (22), the switching circuit (22) being able to generate, as output (22A, 22B), a switched signal having at least two states, and an inductive element (24) able to smooth the switched signal to obtain a smoothed signal (I1, I3), the smoothed signal (I1, I3) having a useful component and a stray component. The amplification device (10) further comprises a compensation circuit (16), for each amplification stage (12, 14), able to generate a compensation signal (I2, I4) of the stray component of the smoothed signal (I1, I3) generated in the inductive element (24) of the corresponding amplification stage (12, 14).

In the present invention, a differential amplifier that includes a first output transistor and a second output transistor includes a boost circuit that includes a third output transistor and a fourth output transistor. The first output transistor delivers a current according to a first differential signal generated in a differential stage to an output terminal. The second output transistor extracts a current according to a second differential signal generated as a signal which is the same phase with a different potential of the first differential signal from the output terminal. The third output transistor delivers a current to the output terminal according to a level-shifting signal generated by level-shifting the first differential signal. The fourth output transistor extracts a current from the output terminal according to a level-shifting signal generated by level-shifting the second differential signal. As the third and fourth output transistors, transistors having withstand voltages against gate-source voltages lower than those of the first and second output transistors and drain currents larger than those of the first and second output transistors are employed.

Apparatus useful for receiving or transmitting voltage signals might include a current generator having first and second inputs and configured to generate a current flow between first and second outputs responsive to a voltage difference between its first and second inputs. The apparatus might further include a feedback amplifier having a first input connected to the first output of the current generator, a second input connected to the second output of the current generator, a first voltage signal node connected to its first input through a first resistance, and a second voltage signal node connected to its second input through a second resistance, wherein a first inverter is connected in parallel with the first resistance, a second inverter is connected in parallel with the second resistance, and a pair of cross-coupled inverters are connected between the first voltage signal node and the second voltage signal node.

A circuit includes a Superconducting Quantum Interference Array (SQIF), a bias circuit, and a coil. The SQIF generates an output voltage that is a transfer function of the magnetic flux perpendicularly passing through the SQIF. An external magnetic field and a bias magnetic field supply the magnetic flux. The bias circuit generates a bias current for biasing the SQIF at an operating point. The coil generates the bias magnetic field through the SQIF from the bias current of the bias circuit. The bias magnetic field provides nullifying feedback to the SQIF that counterbalances a low-frequency portion of the external magnetic field, such that the output voltage of the SQIF detects a high-frequency portion of the external magnetic field. The circuit can be a receiver with the output voltage of the SQIF detecting an electromagnetic signal while the receiver is moving with changing orientation relative to the Earth's magnetic field.

A receiver topology for supporting various combinations of interband carrier aggregation (CA) signals, intraband non-contiguous CA and non-CA signals having different combinations of signals aggregated therein.

An amplifier circuit including an input amplifier, an output amplifier and a diode device is provided. The output amplifier is coupled to the input amplifier and outputs an output voltage. The diode device is coupled between an output end and an input end of the output amplifier. When a voltage difference between the output end and the input end of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced.

A gradient amplifier driver stage circuit includes: a gradient coil and a plurality of gradient driver modules electrically cascaded with each other and forming an output end, the output end being electrically connected to the gradient coil, wherein each gradient driver module includes a pre-stage power supply and a bridge amplifier connected in parallel, output voltage of the pre-stage power supplies of the plurality of gradient driver modules are the same, and each gradient driver module is configured to provide an inductive voltage drop and a resistive voltage drop on the gradient coil.

A receiver topology for supporting various combinations of interband carrier aggregation (CA) signals, intraband non-contiguous CA and non-CA signals having different combinations of signals aggregated therein.

Disclosed herein are circuits, devices and methods that address challenges associated with power amplifier systems. A power amplifier system includes two or more fast error amplifiers coupled to corresponding power amplifiers. The fast error amplifiers are configured to generate envelope tracking signals based on a signal envelope, the envelope tracking signals modifying a DC-DC regulated voltage from a DC-DC converter to more efficiently operate the power amplifiers. By splitting the envelope tracking between two or more fast error amplifiers and amplification between corresponding two or more power amplifiers, the power, frequency or bandwidth, linearity, signal-to-noise ratio, efficiency, or the like of the power amplifier system can be improved. Wireless communications configurations with such power amplifier systems can provide uplink carrier aggregation and/or cellular signals based on standards and protocols that require increased bandwidth and/or power.