An ultrasound probe buffer is provided. The ultrasound probe buffer may include a high impedance amplifier having a common-source core stage with series-series local feedback. The high impedance amplifier may include a first MOSFET and a second MOSFET, wherein a source terminal of the first MOSFET is coupled to a source terminal of the second MOSFET.

The present invention relates to a control circuit for producing a first and second control signals in order for a clock signal to break before making delays, comprising a first and second AND gates for receiving clock signals, first and second alignment blocks that receives output signals from the first and second AND gates for providing alignment prior to transmitting the first and second control signals, and generate the first and second control signals, respectively.

An amplifier includes an input stage, a folded cascode stage, and a class AB output stage. The folded cascode stage is coupled to the input stage. The class AB output stage is coupled to the folded cascode stage. The class AB output stage includes a high-side output transistor, a low-side output transistor, and a high-side feedback circuit that is coupled to the high-side output transistor. The high-side feedback circuit includes a high-side sense transistor and a high-side feedback transistor. The high-side sense transistor includes a control terminal that is coupled to a control terminal of the high-side output transistor. The high-side feedback transistor is coupled to an output of the high-side sense transistor and to the folded cascode stage. A first output of the folded cascode stage is coupled to the control terminal of the high-side sense transistor and to the control terminal of the high-side output transistor.

In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.

An active low-power termination circuit includes a first leg of a pair of transistors connected in series between the high supply level and ground, where the termination input is at a node between the transistors of the first node. A second leg uses a feed forward mechanism to control the voltage levels on the control gates of the transistors of the first leg. The second leg includes a second pair diode connected transistors, each of which is has its control gate connected to the control gate of the corresponding transistor in the first leg. A variable current source connected in series with the transistors of the second leg and is controlled by the output of a difference amplifier that has one input connect to an intermediate node of the second leg and a second input connected to a reference level intermediate to the high supply level and ground.

A power amplifier circuit includes a differential to single-ended converter, a gain stage circuit, a driver stage circuit, and an output stage circuit connected in series, and a bias circuit connected to a bias voltage port of the gain stage circuit for adjusting a bias voltage of the gain stage circuit. The bias voltage is adjustable to ensure low power consumption, improve the efficiency of the power amplifier circuit and prevent process, voltage and temperatures from affecting the performance of the power amplifier circuit.

An amplifier includes an input stage, a folded cascode stage, and a class AB output stage. The folded cascode stage is coupled to the input stage. The class AB output stage is coupled to the folded cascode stage. The class AB output stage includes a high-side output transistor, a low-side output transistor, and a high-side feedback circuit that is coupled to the high-side output transistor. The high-side feedback circuit includes a high-side sense transistor and a high-side feedback transistor. The high-side sense transistor includes a control terminal that is coupled to a control terminal of the high-side output transistor. The high-side feedback transistor is coupled to an output of the high-side sense transistor and to the folded cascode stage. A first output of the folded cascode stage is coupled to the control terminal of the high-side sense transistor and to the control terminal of the high-side output transistor.

Power amplification system is disclosed. A power amplification system can include a Class-E push-pull amplifier including a transformer balun. The power amplification can further include a reactance compensation circuit coupled to the transformer balun. In some embodiments, the reactance compensation circuit is configured to reduce variation over frequency of a fundamental load impedance of the power amplification system.

A two-stage operational amplifier is provided to comprise a bias voltage generator, a first stage operational amplifier and a second stage operational amplifier, wherein the first stage operational amplifier comprises a folded cascode amplifier circuit and a cross coupling load, the cross coupling load is coupled to a load differential pair in the folded cascode amplifier circuit, the cross coupling load comprises two transistors, the two transistors in the cross coupling load and two transistors in the load differential pair constitute two current mirror structures, which are cross coupled. In the solution, the cross coupling load is added to the load differential pair in the folded cascode amplifier circuit, to increase gain of the two-stage operational amplifier by using positive feedback and negative conductance gain enhancement technology; while parameters of MOSFETs in the folded cascode amplifier circuit are properly set to reduce noise of the two-stage operational amplifier.

An amplifier circuit includes an input amplifier; an output unity gain buffer; and a second unity gain buffer. The output unity gain buffer and the second unity gain buffer are each configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input amplifier. A unity gain amplifier includes an input unity gain amplifier; and an output unity gain buffer and a second unity gain buffer. The buffers are configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input unity gain amplifier.