Disclosed herein are implantable medical devices (IMDs) including a receiver and a battery, and methods for use therewith. The receiver includes first and second differential amplifiers, each of which monitors for a predetermined signal within a frequency range and drains power from the battery while enabled, and while not enabled drains substantially no power from the battery. To remove undesirable input offset voltages, each of the differential amplifiers, while enabled, is selectively put into an offset correction phase during which time the predetermined signal is not detectable by the differential amplifier. At any given time at least one of the first and second differential amplifiers is enabled without being in the offset correction phase so that at least one of the differential amplifiers is always monitoring for the predetermined signal. In this manner, the receiver is never blind to signals, including the predetermined signals, sent by another IMD.

A circuit arrangement comprises a first input node, a first output node, a sampling capacitor means and a first switching means being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means, the first input node and the first output node in such a way that the sampling capacitor means is conductively connected to the first input node and disconnected from the first output node in the first switching state and the sampling capacitor means is disconnected from the first input node and conductively connected to the first output node in the second switching state. A first charge-storing element is coupled via a second switching means to the first input node in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means in the first switching state.

A circuit arrangement comprises a first input node, a first output node, a sampling capacitor means and a first switching means being switchable between a first switching state and a second switching state. The first switching means is coupled to the sampling capacitor means, the first input node and the first output node in such a way that the sampling capacitor means is conductively connected to the first input node and disconnected from the first output node in the first switching state and the sampling capacitor means is disconnected from the first input node and conductively connected to the first output node in the second switching state. A first charge-storing element is coupled via a second switching means to the first input node in such a way that the charge-storing element is charged in the first switching state and discharged in the second switching state, thereby at least partly compensating current flow for charging the sampling capacitor means in the first switching state.

A power amplifying apparatus includes a first bias circuit that generates a first bias current having a first magnitude, a first amplification circuit connected between a first node and a second node, and that receives the first bias current, amplifies a signal input through the first node, and outputs a first amplified signal to the second node, a second bias circuit that generates a second bias current having a second magnitude that is different from the first magnitude of the first bias current, and a second amplification circuit connected in parallel with the first amplification circuit between the first node and the second node, and that receives the second bias current, amplifies the signal input through the first node, and outputs a second amplified signal to the second node, wherein the second amplification circuit may have a size that is different from a size of the first amplification circuit.

A digital amplifier includes a pulse-width adjustment circuit that adjusts the pulse width of a digital signal, a switching circuit that amplifies the output signal of the pulse-width adjustment circuit, and a feedback signal generator that generates a feedback signal based on the output signal of the switching circuit.

A signal processing system may include a modulation stage configured to generate a modulated input signal, an open-loop switched mode driver coupled to the modulation stage and configured to generate an output signal from the modulated input signal, a voltage regulator configured to generate a supply voltage that supplies electrical energy to the open-loop switched mode driver, and a control subsystem configured to, when a magnitude of the modulated input signal falls below a threshold magnitude, control the voltage regulator to control the supply voltage such that the output signal varies non-linearly with the modulated input signal for magnitudes of the modulated input signal below the threshold magnitude.

Resistor mismatch may be digitally compensated based on a known resistor mismatch, power supply information, and/or other operating parameters of the amplifier. The digital compensation may be applied to the digital input signal before conversion for processing and amplification in the analog domain. An amplifier with digital compensation for resistor mismatch may be used in a class-D amplifier with a closed loop and feedforward feedback. A class-D or other amplifier with digital compensation may be integrated with electronic devices such as mobile phones.

A digital amplifier includes a digital PWM generator, a first amplifier circuit, a first low-pass filter, a second amplifier circuit, a second low-pass filter, an attenuator, an error extractor, an adder, and a voltage supply unit. The first amplifier circuit amplifies a digital PWM signal at a second voltage. The first low-pass filter extracts a low-frequency band voltage signal from the amplified digital PWM signal, and outputs the extracted voltage signal to a load. The second amplifier circuit amplifies the generated digital PWM signal at a third voltage. The error extractor extracts an error signal. The adder adds a digital error signal whose feedback gain is adjusted to a digital audio signal. The voltage supply unit generates the third voltage that has a voltage value of a predetermined ratio to a voltage value of the second voltage, and supplies the third voltage to the second amplifier circuit.

A chopper stabilized amplifier includes a first transconductance amplifier, first chopping circuitry coupled to an input of the first transconductance amplifier for chopping an input signal and applying the chopped input signal to the input of the first transconductance amplifier, and second chopping circuitry coupled to an output of the first transconductance amplifier for chopping an output signal produced by the first transconductance amplifier. A ping-pong notch filter is connected to an output of the second chopping circuitry and performs an integrate and transfer function on a chopped output signal produced by the second chopping circuitry to filter ripple voltages. The ping-pong notch filter includes parallel connected first and second notch filters, each of which has an input coupled to the output of the second chopping circuitry.

A chopper stabilized amplifier includes a first transconductance amplifier, first chopping circuitry coupled to an input of the first transconductance amplifier for chopping an input signal and applying the chopped input signal to the input of the first transconductance amplifier, and second chopping circuitry coupled to an output of the first transconductance amplifier for chopping an output signal produced by the first transconductance amplifier. A ping-pong notch filter is connected to an output of the second chopping circuitry and performs an integrate and transfer function on a chopped output signal produced by the second chopping circuitry to filter ripple voltages. The ping-pong notch filter includes parallel connected first and second notch filters, each of which has an input coupled to the output of the second chopping circuitry.