H03F3/50

Transmitter system and method of calibration
10014828 · 2018-07-03 · ·

Embodiments of the present disclosure provide a transmitter system including: a source follower (SF) sub-stage having a pair of transistors, one being coupled to a biasing voltage at a gate terminal thereof, and the other including a fully depleted semiconductor on insulator (FDSOI) transistor coupled to an input signal at a gate terminal thereof, and coupled to a calibration voltage at a back-gate terminal thereof. A mixer sub-stage includes a mixer input node coupled to the SF output node of the pair of transistors of the SF sub-stage, and the mixer input node is electrically coupled in parallel to two FDSOI mixer transistors, with the FDSOI mixer transistor being electrically coupled to a respective back-gate voltage. The FDSOI mixer transistors each include a gate terminal coupled to an input voltage, while a second source/drain terminal of the FDSOI mixer transistors are each electrically coupled to a mixer output node.

Input/output cell for integrated circuits

An integrated circuit and method are provided. The integrated circuit comprises: a digital core configured to output a first voltage signal; and a first input/output cell; wherein the first input/output cell is configured to convert the first voltage signal to a first current signal and provide the first current signal to circuitry external to the integrated circuit.

Input/output cell for integrated circuits

An integrated circuit and method are provided. The integrated circuit comprises: a digital core configured to output a first voltage signal; and a first input/output cell; wherein the first input/output cell is configured to convert the first voltage signal to a first current signal and provide the first current signal to circuitry external to the integrated circuit.

SOURCE FOLLOWER

A source follower includes a first transistor, a first output module, a second transistor, a second output module and a feedback module. The first terminal and the control terminal of the first transistor are configured to respectively receive a first base voltage and a first control voltage. The second terminal of the first transistor and the first output module are electrically connected to a first output terminal. The first terminal and the control terminal of the second transistor are configured to respectively receive a first base voltage and a second control voltage. The second terminal of the second transistor and the second output module are electrically connected to a second output terminal. The feedback module is electrically connected to the control terminal of the first transistor, the control terminal of the second transistor and a reference node of the second output module.

Telescopic amplifier with improved common mode settling
09973198 · 2018-05-15 · ·

Telescopic amplifier circuits are disclosed. In an embodiment, a telescopic amplifier includes an input stage for receiving differential input signals, an output stage for outputting differential output signals at the drains of a first output transistor and a second output transistor, a tail current transistor coupled to sources of a first input transistor and a second input transistor, a common mode feedback circuit coupled to the differential output signals and outputting a common mode output signal, and a circuit element coupled between the common mode output signal and a gate of the tail current transistor. In an embodiment the circuit element is a resistor. In another embodiment the circuit element is a source follower transistor. In additional embodiments a phase margin of the common mode feedback open loop gain of the amplifier is determined by the value of the resistor. Additional embodiments are disclosed.

System and Method for Signal Read-Out Using Source Follower Feedback
20180132024 · 2018-05-10 ·

An embodiment amplifier circuit includes a pair of subcircuits that includes a first subcircuit and a second subcircuit, each of which includes a buffer amplifier and a feedback circuit that includes a feedback capacitor. The amplifier circuit also includes a pair of output terminals. The first subcircuit and the second subcircuit each generate a different output signal of a pair of output signals that includes a first output signal and a second output signal. The amplifier circuit is configured for receiving a positive differential input signal at the first subcircuit, receiving a negative differential input signal at the second subcircuit, and receiving the pair of output signals at the pair of output terminals. The amplifier circuit is also configured for transmitting the first output signal to the feedback circuit of the first subcircuit, and transmitting the second output signal to the feedback circuit of the second subcircuit.

LOW IMPEDANCE ADAPTIVE BIAS SCHEME FOR POWER AMPLIFIER
20180123517 · 2018-05-03 ·

An adaptive bias circuit for a power amplifier may include a terminal node coupled to the power amplifier. The adaptive bias circuit may also include a low impedance bias circuit coupled to the terminal node. The adaptive bias circuit may further include a high drive bias circuit coupled to the low impedance bias circuit through the terminal node. A separation device may be arranged between the low impedance bias circuit and the high drive bias circuit.

LOW IMPEDANCE ADAPTIVE BIAS SCHEME FOR POWER AMPLIFIER
20180123517 · 2018-05-03 ·

An adaptive bias circuit for a power amplifier may include a terminal node coupled to the power amplifier. The adaptive bias circuit may also include a low impedance bias circuit coupled to the terminal node. The adaptive bias circuit may further include a high drive bias circuit coupled to the low impedance bias circuit through the terminal node. A separation device may be arranged between the low impedance bias circuit and the high drive bias circuit.

Individual DC and AC current shunting in optical receivers

A circuit may include amplifier circuitry configured to receive a current signal at an amplifier input node, convert the current signal to a voltage signal, and output the voltage signal at an amplifier output node. The circuit may also include overload circuitry configured to receive a replica DC input voltage and a replica DC output voltage. The overload circuitry may be further configured to detect that the current signal exceeds a threshold level based on the replica DC input voltage and the replica DC output voltage. In addition, the overload circuitry may be configured to, in response to and based on detecting that the current signal exceeds the threshold level, direct DC current of the current signal through a DC shunt path and direct AC current of the current signal through an AC shunt path. The AC shunt path may be different from the DC shunt path.

ULTRA-BROADBAND TRANSIMPEDANCE AMPLIFIERS (TIA) FOR OPTICAL FIBER COMMUNICATIONS

Design of ultra broadband transimpedance amplifiers (TIA) for optical fiber communications is disclosed. In one embodiment, a TIA comprises a g.sub.m-boosted dual-feedback common-base stage, a level shifter and an RC-degenerated common-emitter stage, and a first emitter-follower stage, wherein the first emitter follower stage is inductively degenerated. An output of the TIA is buffered using a second emitter-follower stage.