An analogue amplification device comprises a first stage with a common base or gate transistor that receives the modulated input current on its emitter or its source and the output signal of this first stage corresponds to the signal of the collector, a second stage formed by a follower amplifier comprising a transistor with a common collector or drain setup, a third stage that comprises a transistor with a common emitter setup, and a fourth stage that is an amplifying stage with means allowing the realization of, on the one hand, an amplification, and on the other hand, a matching of impedance. The device can be applied to a laser anemometer with optical retro-injection.

A signal amplifier includes a band suppression filter configured to suppress a preset band among bands included in an input signal, a first common source-type amplifier connected between a supply terminal of a driving voltage and a ground terminal and configured to amplify a first input signal separated from an output signal of the band suppression filter in a common input node to provide a first amplified signal to a common output node, a second common source-type amplifier configured to amplify a second input signal separated from the output signal of the band suppression filter in the common input node to provide a second amplified signal to the common output node, and an output matcher configured to match levels of impedance between the common output node and an output terminal and to transfer a combined signal to the output terminal.

In one aspect, a buffer circuit comprises a source or emitter follower input stage and output stage. A load is provided between the stages which comprises a representation of an output load of the buffer circuit. This improves the circuit linearity whilst enabling a high input impedance to be obtained. In another aspect, a buffer circuit comprises a source or emitter follower output stage. A load is in the form of a filter is provided and which comprises a representation of an output load of the buffer circuit.

A power efficient device for driving a load comprising a low current path and a high current path, wherein the high current path is driven by a first voltage source. In order to accommodate larger turn on voltages of possible load devices while maintaining low power operation, an additional voltage source exceeding the voltage source in the high current path is introduced in the low current path.

A power efficient device for driving a load comprising a low current path and a high current path, wherein the high current path is driven by a first voltage source. In order to accommodate larger turn on voltages of possible load devices while maintaining low power operation, an additional voltage source exceeding the voltage source in the high current path is introduced in the low current path.

Methods and circuits for maximizing gain of a voltage follower circuit are provided. The method includes using a NMOS voltage replica generation circuit, a PMOS voltage replica generation circuit, a NPN BJT voltage replica generation circuit, a n-channel JFET voltage replica generation circuit, a P-Channel JFET voltage replica generation circuit and a PNP BJT voltage replica generation circuit. The overall gain for the various transistor families is almost equal to unity.

Methods and circuits for maximizing gain of a voltage follower circuit are provided. The method includes using a NMOS voltage replica generation circuit, a PMOS voltage replica generation circuit, a NPN BJT voltage replica generation circuit, a n-channel JFET voltage replica generation circuit, a P-Channel JFET voltage replica generation circuit and a PNP BJT voltage replica generation circuit. The overall gain for the various transistor families is almost equal to unity.

An input stage of a chip includes a source driver and a sensing and clamping circuit. The source follower is arranged for receiving an AC-coupled signal to generate an output signal at an output terminal. The sensing and clamping circuit is coupled to the source follower, and is arranged for clamping the output terminal of the source follower at a fixed DC voltage.

An apparatus for performing capacitor amplification in an electronic device may include a first resistor and a second resistor that are connected in series and coupled between a set of input terminals of a receiver in the electronic device, a common mode capacitor having a first terminal coupled to a common mode terminal and having a second terminal, and an alternating current (AC)-coupled amplifier that is coupled between the common mode terminal and the second terminal of the common mode capacitor. The first resistor and the second resistor may be arranged for obtaining a common mode voltage at the common mode terminal between the first resistor and the second resistor. In addition, the common mode capacitor may be arranged for reducing a common mode return loss. Additionally, the AC-coupled amplifier may be arranged for performing capacitor amplification for the common mode capacitor.

Apparatus for electrically connecting measurement apparatus to a biological subject, the apparatus including a signal delivery circuit including a current buffer having a current buffer input for receiving a signal from a signal source and a current buffer output for supplying a current to an electrode attached to the biological subject, and a voltage buffer having a voltage buffer input coupled to the current buffer output and a voltage buffer output for providing a voltage signal indicative of a voltage at the electrode, to a sensor.