A system includes a transimpedance amplifier, disposed on a chip, having a front-end section and a back-end section; an on-chip linear regulator, on the chip, arranged to power the front-end section; and an off-chip switching regulator, off the chip, arranged to power the back-end section. The arrangement provides low noise power supply for the front-end section, while providing a more power efficient switching regulator to power the back-end section. The output voltage of the on-chip linear regulator and the output voltage of the off-chip switching regulator are controlled to be the same.

A test system can use first and different second driver stages to provide test signals to a device under test (DUT). A compound stage can receive signals from the driver stages and provide a voltage output signal to the DUT, such as via a gain circuit. The compound stage can include a buffer circuit configured to provide a first portion of the voltage output signal based on a first output signal from the first driver stage, and the compound stage can include a transimpedance circuit configured to provide a second portion of the voltage output signal based on a second output signal from the second driver stage. In an example, the gain circuit can receive a superposition signal comprising the first and second portions of the voltage output signal and, in response, provide a test signal to the DUT.

A low-power, low-noise amplifier with a negative feedback loop is provided. A low noise amplifier (LNA) includes a common gate (CG) amplifier, a common source (CS) amplifier having a gate connected to a source of the CG amplifier, a differential current balancer (DCB) connected to an output end of the CG amplifier and an output end of the CS amplifier, a symmetric load connected to the DCB, and a current bleeding circuit with one end connected to the output end of the CS amplifier and another end connected to the symmetric load, the current bleeding circuit including an active element and a load corresponding to the symmetric load, and an output end of the active element is connected to a gate of the CG amplifier.

A system may include a first input for receiving a first signal for driving an amplifier that drives a load, a second input for receiving a second signal driven by the amplifier, and an instability detector for detecting instability of a feedback loop for controlling the first signal based on comparison of the first signal and the second signal.

A system may include a first input for receiving a first signal for driving an amplifier that drives a load, a second input for receiving a second signal driven by the amplifier, and an instability detector for detecting instability of a feedback loop for controlling the first signal based on comparison of the first signal and the second signal.

Disclosed are methods for biasing amplifiers and for manufacturing bias circuits bias for biasing amplifiers. A power amplifier bias circuit can include an emitter follower device and an emitter follower mirror device coupled to form a mirror configuration. The emitter follower device can be configured to provide a bias signal for a power amplifier at an output port. The power amplifier bias circuit can include a reference device configured to mirror an amplifying transistor of an amplifying device of the power amplifier. The emitter follower mirror device can be configured to provide a mirror bias signal to the reference device. A node between the emitter follower device and the emitter follower mirror device can have a voltage of approximately twice a base-emitter voltage (2Vbe) of the amplifying transistor.

Disclosed are methods for biasing amplifiers and for manufacturing bias circuits bias for biasing amplifiers. A power amplifier bias circuit can include an emitter follower device and an emitter follower mirror device coupled to form a mirror configuration. The emitter follower device can be configured to provide a bias signal for a power amplifier at an output port. The power amplifier bias circuit can include a reference device configured to mirror an amplifying transistor of an amplifying device of the power amplifier. The emitter follower mirror device can be configured to provide a mirror bias signal to the reference device. A node between the emitter follower device and the emitter follower mirror device can have a voltage of approximately twice a base-emitter voltage (2Vbe) of the amplifying transistor.

A low-power, low-noise amplifier with a negative feedback loop is provided. A low noise amplifier (LNA) includes a common gate (CG) amplifier, a common source (CS) amplifier having a gate connected to a source of the CG amplifier, a differential current balancer (DCB) connected to an output end of the CG amplifier and an output end of the CS amplifier, a symmetric load connected to the DCB, and a current bleeding circuit with one end connected to the output end of the CS amplifier and another end connected to the symmetric load, the current bleeding circuit including an active element and a load corresponding to the symmetric load, and an output end of the active element is connected to a gate of the CG amplifier.

A receiving circuit and method for increasing bandwidth are provided. The receiving circuit includes a linear equalizer circuit and a variable gain amplifier. The linear equalizer circuit includes a first negative impedance converter, to generate a first capacitance. The variable gain amplifier is coupled to the linear equalizer circuit. The variable gain amplifier includes a first-stage gain circuit and a feedback circuit. The first-stage gain circuit is coupled to the feedback circuit, and the feedback circuit generates a zero-point at the output end of the first-stage gain circuit.

A receiving circuit and method for increasing bandwidth are provided. The receiving circuit includes a linear equalizer circuit and a variable gain amplifier. The linear equalizer circuit includes a first negative impedance converter, to generate a first capacitance. The variable gain amplifier is coupled to the linear equalizer circuit. The variable gain amplifier includes a first-stage gain circuit and a feedback circuit. The first-stage gain circuit is coupled to the feedback circuit, and the feedback circuit generates a zero-point at the output end of the first-stage gain circuit.