Aspects of the subject disclosure may include a Doherty amplifier that includes a carrier amplifier having an output terminal, an output network coupled to the output terminal, and a peaking amplifier, wherein the output network comprises a non-linear reactance component, and wherein the non-linear reactance component changes an effective impedance of a load presented to the carrier amplifier when the peaking amplifier is off. Other embodiments are disclosed.

The present disclosure relates to an amplifier arrangement comprising a first amplifier, a second amplifier and an output combiner arranged to combine respective output signals of the first amplifier and the second amplifier into an output signal of the amplifier arrangement. An amplifier arrangement input signal is arranged as input signal to the first amplifier, and a difference signal, representing a difference between the amplifier arrangement input signal and a scaled output signal of the first amplifier, is arranged as input to the second amplifier. The output combiner is arranged to modulate the loads of the first amplifier and the second amplifier in dependence of the output signal of the second amplifier.

Provided is a high-frequency amplifier capable of making a circuit substrate small and reducing a cost. A high-frequency amplifier is provided with a first substrate including a matching unit, and a second substrate including a transistor and a first impedance converter connected to each other, in which the matching unit of the first substrate and the first impedance converter are connected to each other via a first connection. Furthermore, the high-frequency amplifier is further provided with a third substrate including a matching unit, in which the second substrate may further include a second impedance converter connected to the transistor, and the second impedance converter and the matching unit of the third substrate may be connected to each other via a second connection.

In some examples, a hybrid Chireix-Doherty amplifier comprises a first and second input network, a main amplifier coupled to a first output of the first input network, an auxiliary amplifier coupled to a second output of the second input network, and a combiner network. The combiner network is coupled to a first output of the main amplifier and an output of the auxiliary amplifier. The combiner network includes an output node for coupling to a load, e.g., an antenna of a base station for a radio network. The main amplifier is implemented as an inverse class-F amplifier.

According to an embodiment of the disclosure, a series or source feedback is provided to a solid-state power amplifier to achieve improved amplifier output power, good impedance match, and low voltage standing wave ratio (VSWR). In an embodiment, an inductive element is coupled to the source of the power amplifier transistor to serve as a series or source feedback for the transistor. In an embodiment, a high-impedance transmission line such as a microstrip or coplanar waveguide is provided as an inductive element coupled to the source of the transistor. In an embodiment, a series or source feedback is provided to each amplifier in a multistage amplifier circuit.

A semiconductor device and an amplifier assembly implementing the semiconductor device are disclosed. The semiconductor device, which is a type of Doherty amplifier, includes first transistor elements for a carrier amplifier of the Doherty amplifier and second transistor elements for a peak amplifier. A feature of the Doherty amplifier is that the first transistor elements and the second transistor elements are disposed alternatively on a common semiconductor substrate.

A power amplifier includes an active device and an output matching circuit operably connected with the active device. The output matching circuit includes a bandpass impedance transformer, in particular, a multimode bandpass impedance transformer. The multimode bandpass impedance transformer may include a multimode resonator and coupling feed lines.

The disclosure relates to a pre-5.sup.th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4.sup.th-Generation (4G) communication system such as Long-Term Evolution (LTE). A Doherty power amplifier of a wireless communication system is provided. The Doherty power amplifier includes a first power amplifier, a second power amplifier, a first transmission line, a 4-port coupler, and a load impedance, and the 4-port coupler includes a first port, a second port, a third port, and a fourth port, the first power amplifier is coupled with the 4-port coupler through the first port, the second power amplifier is coupled with the 4-port coupler through the fourth port, the load impedance is coupled with the 4-port coupler through the third port, the first transmission line is disposed between the first power amplifier and the first port of the 4-port coupler, and the second port is an output end of the power amplifier.

There is presented a wireless device for dual-polarization beamforming. The wireless device comprises an antenna array. The antenna array comprises antenna elements of mutually orthogonal polarizations and a baseband chain. The antenna elements of both polarizations are operatively connected to the baseband chain. There is also presented a method for dual-polarization beamforming as performed by such a wireless device.

In some embodiments, an amplifier system can include an amplifier circuit having first and second amplifiers configured to amplify respective first and second portions of an input signal. Each of the first and second amplifiers can include a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the amplifier circuit and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers. The amplifier system can further include a supply circuit configured to provide a non-envelope tracking supply voltage to the output transistor of the cascode stage of the at least one of the first and second amplifiers.