Patent classifications
H03F3/62
Bidirectional Variable Gain Amplification
An apparatus is disclosed for bidirectional variable gain amplification. In an example aspect, an apparatus comprises an antenna element of an antenna array and a wireless transceiver. The wireless transceiver comprises a transmit path coupled to the antenna element, a receive path coupled to the antenna element, and a phase shifter disposed in both the transmit path and the receive path. The phase shifter is configured to operate in an active mode and comprises a first bidirectional variable gain amplifier and a second bidirectional variable gain amplifier.
EXTENDED SPECTRUM TDMA UPSTREAM AND DOWNSTREAM CABLE AMPLIFIER
A method of bidirectional amplification of proprietary TDMA (Time-Division Multiple Access) data modulated signals over CATV infrastructure is described. A method of upstream/downstream switching based on carrier detection/measurement originated from the master and slave modems embodiment is described, along with upstream/downstream direction switching based on the encoded switching command detection, originating from the master modem.
Systems and methods for full duplex amplification
An amplification subsystem for a communication system includes a downstream amplifier configured to transmit a downstream signal within a first frequency range, an upstream amplifier configured to transmit an upstream signal within a second frequency range, and a bidirectional amplifier configured to selectively transmit a mid-band signal in either of the upstream and downstream direction.
Systems and methods for full duplex amplification
An amplification subsystem for a communication system includes a downstream amplifier configured to transmit a downstream signal within a first frequency range, an upstream amplifier configured to transmit an upstream signal within a second frequency range, and a bidirectional amplifier configured to selectively transmit a mid-band signal in either of the upstream and downstream direction.
VARIABLE GAIN CIRCUIT, HIGH FREQUENCY SWITCH, AND TRANSISTOR CIRCUIT
A variable gain circuit includes: input/output terminals P1 and P2 configured to input/output a high frequency signal; a transistor having a signal terminal a connected to the input/output terminal P1, a signal terminal b connected to the input/output terminal P2, and a control terminal; bias terminals B1, B2 and B3, and a reference voltage terminal respectively set to a first variable voltage, a second variable voltage, a third variable voltage, and a fixed voltage that are independent of one another; an impedance element connected between the bias terminal B1 and the signal terminal a; an impedance element connected between the bias terminal B2 and the signal terminal b; an impedance element connected between the bias terminal B3 and the control terminal; and a first switch configured to switch between connecting and not connecting the reference voltage terminal and the control terminal.
VARIABLE GAIN CIRCUIT, HIGH FREQUENCY SWITCH, AND TRANSISTOR CIRCUIT
A variable gain circuit includes: input/output terminals P1 and P2 configured to input/output a high frequency signal; a transistor having a signal terminal a connected to the input/output terminal P1, a signal terminal b connected to the input/output terminal P2, and a control terminal; bias terminals B1, B2 and B3, and a reference voltage terminal respectively set to a first variable voltage, a second variable voltage, a third variable voltage, and a fixed voltage that are independent of one another; an impedance element connected between the bias terminal B1 and the signal terminal a; an impedance element connected between the bias terminal B2 and the signal terminal b; an impedance element connected between the bias terminal B3 and the control terminal; and a first switch configured to switch between connecting and not connecting the reference voltage terminal and the control terminal.
NETWORK INTERFACE DEVICE
A network interface device includes a passive path between an entry port and a first port. The network interface device also includes an active path between the entry port and a second port. The network interface device also includes a buffer in the active path configured to absorb, attenuate, terminate, or isolate radio-frequency (RF) signals. The network interface device also includes a switching element in the active path configured to cause the RF signals to bypass the buffer when the network interface is in a first state that exists during powered operation of the network interface device, and direct the RF signals to the buffer when the network interface device is in a second state that exists during non-powered operation or faulted operation of the network interface device.
NETWORK INTERFACE DEVICE
A network interface device includes a passive path between an entry port and a first port. The network interface device also includes an active path between the entry port and a second port. The network interface device also includes a buffer in the active path configured to absorb, attenuate, terminate, or isolate radio-frequency (RF) signals. The network interface device also includes a switching element in the active path configured to cause the RF signals to bypass the buffer when the network interface is in a first state that exists during powered operation of the network interface device, and direct the RF signals to the buffer when the network interface device is in a second state that exists during non-powered operation or faulted operation of the network interface device.
Phase Shifter with Bidirectional Amplification
An apparatus is disclosed for bidirectional amplification with phase-shifting. In example implementations, an apparatus includes a phase shifter with a bidirectional amplifier. The bidirectional amplifier includes a first transistor coupled between a first plus node and a second minus node, a second transistor coupled between a first minus node and a second plus node, a third transistor coupled between the first plus node and the second minus node, and a fourth transistor coupled between the first minus node and the second plus node. The bidirectional amplifier also includes a fifth transistor coupled between the first plus node and the second plus node, a sixth transistor coupled between the first minus node and the second minus node, a seventh transistor coupled between the first plus node and the second plus node, and an eighth transistor coupled between the first minus node and the second minus node.
SYSTEMS AND METHODS FOR FULL DUPLEX AMPLIFICATION
An amplification subsystem for a communication system includes a downstream amplifier configured to transmit a downstream signal within a first frequency range, an upstream amplifier configured to transmit an upstream signal within a second frequency range, and a bidirectional amplifier configured to selectively transmit a mid-band signal in either of the upstream and downstream direction.