Circuits and methods for improving IC yield during automated test equipment (ATE) calibration of circuit designs which require I.sub.DD calibration and use a closed feedback bias circuit, such as amplifier circuits. The circuit designs include bias branch/active circuit architectures where the active circuit includes one or more active devices. An example first embodiment uses an on-chip calibration switch between the on-chip grounds of a bias network and an active circuit comprising an amplifier. During calibration of the active circuit by the ATE, the calibration switch is closed, and after completion of calibration, the calibration switch is opened. An example second embodiment utilizes an active on-chip feedback loop calibration circuit to equalize voltages between the on-chip grounds of a bias network and an active circuit comprising an amplifier during calibration of the active circuit. Both embodiments mitigate or overcome miscalibration of active circuit current settings resulting from ATE test probe resistance.

Circuits and methods for improving IC yield during automated test equipment (ATE) calibration of circuit designs which require I.sub.DD calibration and use a closed feedback bias circuit, such as amplifier circuits. The circuit designs include bias branch/active circuit architectures where the active circuit includes one or more active devices. An example first embodiment uses an on-chip calibration switch between the on-chip grounds of a bias network and an active circuit comprising an amplifier. During calibration of the active circuit by the ATE, the calibration switch is closed, and after completion of calibration, the calibration switch is opened. An example second embodiment utilizes an active on-chip feedback loop calibration circuit to equalize voltages between the on-chip grounds of a bias network and an active circuit comprising an amplifier during calibration of the active circuit. Both embodiments mitigate or overcome miscalibration of active circuit current settings resulting from ATE test probe resistance.

Apparatus and methods for reconfigurable power amplifiers are disclosed. In certain embodiments, a mobile device includes a transceiver configured to generate a first radio frequency signal of a first frequency band and a second radio frequency signal of a second frequency band, and a front-end system including a push-pull power amplifier configured to selectively amplify one of the first radio frequency signal or the second radio frequency signal based on a band control signal. The push-pull power amplifier includes an input balun, an output balun, and a pair of amplifiers coupled between the input balun and the output balun. The band control signal is operable to control an output capacitance of the pair of amplifiers.

RF signal amplifiers are provided that include an RF input port, one or more active RF output ports, one or more passive RF output ports, an active communication path, and a passive communication path. Various embodiments include one or more switching devices, one or more directional couplers, one or more diplexers, a power divider network, and/or an attenuator.

RF signal amplifiers are provided that include an RF input port, one or more active RF output ports, one or more passive RF output ports, an active communication path, and a passive communication path. Various embodiments include one or more switching devices, one or more directional couplers, one or more diplexers, a power divider network, and/or an attenuator.

A power amplifier module includes an output-stage amplifier, a driver-stage amplifier, an input switch, an output switch, an input matching circuit, an inter-stage matching circuit, an output matching circuit, and a control circuit. The input switch selectively connects one of a plurality of input signal paths to an input terminal of the driver-stage amplifier. The output switch selectively connects one of a plurality of output signal paths to an output terminal of the output-stage amplifier. The control circuit controls operations of the driver-stage amplifier and the output-stage amplifier. The input switch, the output switch, and the control circuit are integrated into an IC chip. The control circuit is disposed between the input switch and the output switch.

A power amplifier module includes an output-stage amplifier, a driver-stage amplifier, an input switch, an output switch, an input matching circuit, an inter-stage matching circuit, an output matching circuit, and a control circuit. The input switch selectively connects one of a plurality of input signal paths to an input terminal of the driver-stage amplifier. The output switch selectively connects one of a plurality of output signal paths to an output terminal of the output-stage amplifier. The control circuit controls operations of the driver-stage amplifier and the output-stage amplifier. The input switch, the output switch, and the control circuit are integrated into an IC chip. The control circuit is disposed between the input switch and the output switch.

A radio-frequency circuit includes a first power amplifier that outputs a first transmission signal and a second power amplifier that outputs a second transmission signal having a frequency different from a frequency of the first transmission signal. In a period in which the first transmission signal the second transmission signal are simultaneously outputted, at least one of the first power amplifier or the second power amplifier reduces transmission power of the at least one of the first power amplifier or the second power amplifier to cause a power component of intermodulation distortion superimposed on a transmission signal output from the first power amplifier and the second power amplifier to be less than or equal to a threshold value.

A radio frequency module includes: a first low-noise amplifier including a first amplification element as an input stage and a second amplification element as an output stage; a second low-noise amplifier including a third amplification element as an input stage and the second amplification element as an output stage, the third amplification element being different from the first amplification element; a first matching circuit connected to an input terminal of the first low-noise amplifier; and a module substrate including a first principal surface and a second principal surface opposite to each other, wherein the first amplification element is disposed on one of the first principal surface and the second principal surface, and the first matching circuit is disposed on the other of the first principal surface and the second principal surface.

Aspects of this disclosure relate to methods of manufacturing bulk acoustic wave components. Such methods include plasma dicing to singulate individual bulk acoustic wave components. A buffer layer can be formed over a substrate of bulk acoustic wave components such that streets are exposed. The bulk acoustic wave components can be plasma diced along the exposed streets to thereby singulate the bulk acoustic wave components