Patent classifications
H03F2200/09
Switched-capacitor power amplifiers
A switched-capacitor power amplifier comprising a plurality of cells and methods for its operation are described. Switched signal lines switch supply to respective capacitors. Switches connect respective signal lines to a first supply and switches connect respective signal lines to a second supply. Pairs of switches on each signal line are switched so that one is switched off whilst the other is switched on. In a full amplitude mode, operation of the switches provides an output having a peak determined by the first supply. A switch signal line is provided between nodes in respective signal lines, a switch being provided in the switch signal line. In a half amplitude mode, switch is switched at the radio frequency in the other direction to that of switches connecting the signal lines to respective ones of the first and second supplies with the other switches being kept open.
Power amplifier
A power amplifier (20) for a transmitter circuit (10) is disclosed. The power amplifier (20) comprises at least one field-effect transistor (100, 100n, 100p) having a gate terminal (110, 110n, 110p) and a bulk terminal (120, 120n, 120p), wherein the at least one field-effect transistor (100, 100n, 100n) is configured to receive an input voltage at the gate terminal (110, 110p, 110n) and a dynamic bias voltage at the bulk terminal (120, 120n, 120p). Furthermore, the power amplifier (20) comprises a bias-voltage generation circuit (130). The input voltage is a linear function of an input signal. The bias-voltage generation circuit (130) is configured to generate the dynamic bias voltage as a nonlinear function of an envelope of the input signal.
Inductive radio frequency power sampler
A power sampler may include a sampling circuit interposed in one leg of a differential-signal circuit. An input balun may convert a single-ended signal from a signal source into a differential signal on first and second differential-signal input ports. An output balun may convert an output differential signal to a single-ended output signal to a signal load. The sampling circuit may include an inductance and a coupling circuit. The inductance may be an inductor and have an impedance higher than a source impedance. The coupling circuit, which may be a balun, is connected to the inductance and outputs a single-ended sample signal having a magnitude proportional to the inductance impedance at the design frequency. A second coupling-circuit output conducts an output differential signal and may be connected to the output balun.
Transmitter device and transceiver device for transmitting different wireless standard signal
A transmitter device which transmits a first transmit signal and a second transmit signal having different wireless communication standards. The transmitter device includes a power amplifier that amplifies the first transmit signal in a first transmission mode. A first impedance circuit provides the amplified first transmit signal to a radio frequency output port. A second impedance circuit is connected to the first impedance circuit and provides an additional impedance to the first impedance circuit in the first transmission mode. A first switch provides the second transmit signal to the first impedance circuit in a second transmission mode. A second switch connects the second impedance circuit and a ground in the first transmission mode, and floats the second impedance circuit in the second transmission mode
System and method for bi-directional radio communication
Apparatus and methods for performing wireless communications are provided. In some embodiments, an apparatus includes a transformer including a first winding, a second winding, and a third winding. The apparatus also includes a first transmitter circuit coupled with the first winding, and a second circuit coupled with the second winding. The third winding is coupled with an antenna. The first transmitter circuit is configured to transmit a first signal to the antenna via magnetic coupling between the first winding and the third winding. The second circuit is configured to tolerate without damage a second signal from the first transmitter circuit, wherein the second signal is generated from the first signal via magnetic coupling between the first winding and the second winding. A turn ratio between the first winding and the second winding can be configured to limit a voltage of the second signal to be within a pre-determined threshold.
WIDEBAND BALUN
Wideband baluns with enhanced amplitude and phase balance are provided. The wideband balun includes a first transmission line connected between a first port and a third port, and a second transmission line connected between a second port and a fourth port, and a third transmission line connected between the third port and a reference voltage, such as ground. To enhance phase and/or amplitude balance of the wideband balun, the wideband balun further includes a compensation structure operable to provide at least one of capacitive compensation or inductive compensation to balance the wideband balun. For example, in certain implementations, the compensation structure includes at least one of (i) a capacitor connected between the first port and the second port or (ii) a fourth transmission line connected between the first transmission line and the third port.
Digital power amplification circuit
A digital power amplification circuit includes a decoding block configured to receive a first stream of digital codes and to derive from the first stream a second stream of digital codes, the decoding block including a decoder configured to decode the digital codes of the first stream and the second stream at a first clock rate, a main digital power amplifier configured to receive the decoded digital codes of the first stream, an upsampler configured to upsample the decoded digital codes of the second stream to a second clock rate that is greater than the first clock rate, an auxiliary digital power amplifier configured to receive the decoded digital codes of the second stream upsampled to the second clock rate, and a summer configured to sum (i) a main output signal of the main digital power amplifier and (ii) an auxiliary output signal of the auxiliary digital power amplifier.
Wideband low noise amplifier (LNA) with a reconfigurable bandwidth for millimeter-wave 5G communication
According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.
Hard-wired address for phased array antenna panels
An apparatus includes a phased array antenna panel and a plurality of beam former circuits. The phased array antenna panel generally comprises a plurality of antenna elements. The plurality of beam former circuits are each mounted on the phased array antenna panel adjacent to a number of the antenna elements. Each beam former circuit has one or more ports directly coupled to each of the adjacent antenna elements. Each beam former circuit may be configured to generate a plurality of radio-frequency output signals at the ports while in a transmit mode and receive a plurality of radio-frequency input signals at the ports while in a receive mode. Each beam former circuit generally implements a hard-wired address.
Broadband Power Combining Arrangement
A generator including a power combiner is provided. The power combiner includes a plurality of inputs, each input connectable to a respective power amplifier for receiving a respective power signal. A plurality of impedance matching circuit branches is connected to a respective one of the plurality of inputs. Each impedance matching circuit branch includes at least one high pass filter section and at least one low pass filter section through which the respective power signal passes. The impedance matching circuit branches are connected so as to combine the power signals from each power amplifier. An output is provided for outputting the combined power signal.