An envelope tracking power supply, which includes a parallel amplifier, switching circuitry, and a parallel switching supply, is disclosed. The envelope tracking power supply provides an envelope power supply signal to a load. The parallel amplifier regulates an envelope power supply voltage of the envelope power supply signal based on a setpoint of the envelope power supply voltage. The switching circuitry at least partially provides the envelope power supply signal via a first inductive element and drives an output current from the parallel amplifier toward zero. The parallel switching supply provides an assist current to further drive the output current from the parallel amplifier toward zero based on an estimate of a current in the first inductive element and an estimate of a current in the load.

A multi-phase amplifier circuit includes an amplification circuit configured to generate a plurality of phase signals and to provide the plurality of phase signals to a plurality of inductors. An inductive coupling between a first pair of inductors differs from an inductive coupling between a second pair of inductors by a first coupling difference. The amplification circuit is configured to provide two phase signals comprising a first phase difference of less than 180 to the first pair of inductors and two further phase signals comprising the first phase difference to the second pair of inductors. An inductive coupling between a third pair of inductors differs from an inductive coupling between a fourth pair of inductors by a second coupling difference. The amplification circuit is configured to provide two phase signals comprising a second phase difference of 180 to the third pair of inductors and two further phase signals comprising the second phase difference to the fourth pair of inductors.

A circuit including: a power amplifier configured to provide amplified signals to a load; an impedance matching network disposed between the power amplifier and the load, the impedance matching network comprising an adjustable impedance unit; and a feedback loop comprising a rectifier, the rectifier being coupled with an output of the power amplifier, the feedback loop further comprising and impedance control circuit configured to receive a signal from the rectifier and to control the adjustable impedance unit in response to the signal from the rectifier.

Power amplification system with adaptive bias control. In some embodiments a power amplification system includes a power amplifier including a radio-frequency (RF) input terminal for receiving an RF signal, an RF output terminal for providing an amplified RF signal, a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals, at least one of the one or more bias signals being based on the power amplifier supply voltage.

Disclosed is a method for producing a stage for amplifying the power of a variable envelope signal including at least one amplifier. For each amplifier, a form of ideal variation in average power POUT.sub.L is selected. For each value of each setting parameter and for each average input power value, a value of an optimisation criterion is calculated on the basis of the mathematical expectation of at least one optimisation parameter. An optimum value of each setting parameter is determined and the amplification stage is produced with a number of amplifiers in parallel determined on the basis of an average output power value and with, for each amplifier, matching circuits providing the optimum values of the setting parameters. The invention also relates to an amplification stage produced in this manner.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

Apparatus and methods for power amplifiers with positive envelope feedback are provided herein. In certain implementations, a power amplifier system includes a power amplification stage that amplifies a radio frequency signal, at least one envelope detector that generates one or more detection signals indicating an output signal envelope of the power amplification stage, and a wideband feedback circuit that provides positive envelope feedback to a bias of the power amplification stage based on the one or more detection signals. The power amplifier system further includes a supply modulator that controls a voltage level of a supply voltage of the power amplification stage based on the one or more detection signals such that the supply voltage is modulated with the output signal envelope through positive envelope feedback.

Aspects disclosed in the detailed description include an envelope tracking (ET) amplifier circuit. The ET amplifier circuit includes ET tracker circuitry configured to provide an ET modulated voltage, which tracks an ET modulated target voltage, to an amplifier circuit(s) for amplifying a radio frequency (RF) signal. The ET amplifier circuit also includes fast switcher circuitry that is activated to provide an alternate current (AC) current to the amplifier circuit(s) when the RF signal includes a higher number of resource blocks (RBs). However, the fast switcher circuitry and its associated control circuitry may incur a processing delay that can cause the fast switcher circuitry to lag behind the ET modulated target voltage. As such, the ET amplifier circuit further includes timing adjustment circuitry to help compensate for the processing delay, thus helping to maintain efficiency of the ET tracker circuitry for improved performance of the ET amplifier circuit.

Embodiments of the disclosure relate to a multi-mode power management system supporting fifth-generation new radio (5G-NR). The multi-mode power management system includes first tracker circuitry and second tracker circuitry each capable of supplying an envelope tracking (ET) modulated or an average power tracking (APT) modulated voltage. In examples discussed herein, the first tracker circuitry and the second tracker circuitry have been configured to support third-generation (3G) and fourth-generation (4G) power amplifier circuits in various 3G/4G operation modes. The multi-mode power management system is adapted to further support a 5G-NR power amplifier circuit(s) in various 5G-NR operation modes based on the existing first tracker circuitry and/or the existing second tracker circuitry. In this regard, the 5G-NR power amplifier circuit(s) can be incorporated into the existing multi-mode power management system with minimum hardware changes, thus enabling 5G-NR support without significantly increasing component count, cost, and footprint of the multi-mode power management system.

A DC-to-DC converter block with multiple supply voltages includes a power circuit, the power circuit including N depletion-mode HEMT transistors (T3_1, T3_2, T3_N), N being a natural number greater than or equal to 3. The DC-to-DC converter block also includes a gate drive circuit for the N depletion-mode HEMT transistors (T3_1, T3_2, T3_N) of the power circuit, the drive circuit including depletion-mode HEMT transistors (T1_1, T2_1, T1_2, T2_2, T1_N, T2_N) configured to drive the gates of the N depletion-mode HEMT transistors (T3_1, T3_2, T3_N) of the power circuit, and the power circuit being powered by N positive and non-zero supply voltages, namely a lower supply voltage (VDD_1), an upper supply voltage (VDD_N), and (N2) intermediate supply voltages (VDD_2) distributed between the lower (VDD_1) and upper (VDD_N) supply voltages.