Patent classifications
H03F2200/102
Wireless Circuitry with Multiple Envelope Tracking Circuits
An electronic device can include a first group of radio-frequency amplifiers coupled to one or more first antenna(s) disposed at a first end of the device, a second group of radio-frequency amplifiers coupled to one or more second antenna(s) disposed at a second opposing end of the device, a first envelope tracking integrated circuit (ETIC) coupled to the first group of radio-frequency amplifiers, and a second envelope tracking integrated circuit (ETIC) coupled to the second group of radio-frequency amplifiers. The first and second ETICs can be coupled together via a bidirectional input-output voltage path and a feedback voltage path. At least the first ETIC can include a first envelope tracking amplifier, a second envelope tracking amplifier, a voltage converter coupled to an output of the first envelope tracking amplifier, and a feedback controller coupled to an output of the second envelope tracking amplifier and configured to adjust the voltage converter.
High efficiency variable voltage supply
Aspects of the present disclosure are generally directed to a power supply for generating an output supply voltage. The power supply generally includes a variable voltage supply configured to generate an intermediate supply voltage based on a reference signal, a correction circuit configured to generate an error signal based on the output supply voltage or the intermediate supply voltage, and a combiner configured to combine the intermediate supply voltage and the error signal to provide the output supply voltage.
Amplifier devices with in-package bias modulation buffer
The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. The amplifiers described herein use a buffer that is implemented inside the device package. Specifically, the amplifiers can be implemented with a gate bias modulation buffer inside the device package, where the gate bias modulation buffer is configured to provide a modulated bias signal to a transistor gate of the amplifier.
Power amplifier
A power amplifier include an amplifier including at least one field effect transistor (FET) that operates in an amplifying stage configured to amplify an input signal, and a body controller configured to control a bias voltage of a body terminal of the FET based on a power of the input signal. The body controller performs controlling so that the bias voltage of the body terminal is reduced in response to the power of the input signal being increased. Accordingly, such a power amplifier exhibits improved linearity.
Multi-band device having multiple miniaturized single-band power amplifiers
Multi-band device having multiple miniaturized single-band power amplifiers. In some embodiments, a power amplifier die can include a semiconductor substrate, and a plurality of power amplifiers (PAs) implemented on the semiconductor substrate. Each PA can be configured to drive approximately a characteristic load impedance of a downstream component along an individual frequency band signal path, such that each PA is sized smaller than a wide band PA configured to drive more than one of the frequency bands associated with the plurality of PAs. The downstream component can include an output filter.
MULTI-MODE RADIO FREQUENCY (RF) POWER AMPLIFIER CIRCUIT
A multi-mode radio frequency (RF) power amplifier circuit is disclosed. The multi-mode RF power amplifier circuit can operate in a low-resource block (RB) mode and a high-RB mode. The multi-mode RF power amplifier circuit includes a driver stage power amplifier and an output stage power amplifier to amplify an RF input signal and generate an RF output signal. A control circuit is configured to provide a constant envelope voltage and an envelope tracking (ET) supply voltage to the driver stage power amplifier and the output stage power amplifier, respectively, in the high-RB mode. As a result, it is possible to optimize RF performance and reduce sensitivity of the driver stage power amplifier and the output stage power amplifier in the high-RB mode, without increasing costs and footprint of the multi-mode RF power amplifier circuit.
ENVELOPE TRACKING FOR HIGH POWER AMPLIFIERS
Disclosed herein are circuits, devices and methods that address challenges associated with power amplifier systems. A power amplifier system includes two or more fast error amplifiers coupled to corresponding power amplifiers. The fast error amplifiers are configured to generate envelope tracking signals based on a signal envelope, the envelope tracking signals modifying a DC-DC regulated voltage from a DC-DC converter to more efficiently operate the power amplifiers. By splitting the envelope tracking between two or more fast error amplifiers and amplification between corresponding two or more power amplifiers, the power, frequency or bandwidth, linearity, signal-to-noise ratio, efficiency, or the like of the power amplifier system can be improved. Wireless communications configurations with such power amplifier systems can provide uplink carrier aggregation and/or cellular signals based on standards and protocols that require increased bandwidth and/or power.
Apparatus and methods for tunable power amplifiers
A power amplifier is described. The power amplifier including at least a first amplifier stage, and at least a first tunable matching network. The first tunable matching network is configured to couple between a first impedance and a second impedance. The first matching network including at least one first set of metal oxide semiconductor variable capacitor arrays.
Memory predistortion in bandwidth limited envelope tracking
An apparatus compensates nonlinearities in envelope tracking (ET) used in a mobile device by limiting a bandwidth of an envelope signal representing an envelope of an input baseband signal to be less than a bandwidth of tracker circuitry, generating a scaled replica of an output signal of the tracker circuitry based on the bandwidth-limited envelope signal, and generating a model distortion signal based on the scaled replica and the input baseband signal, where the model distortion signal emulates ET linearity degradation. The apparatus is further configured to generate an output baseband signal based on the scaled replica, the model distortion signal, and the input baseband signal, where the output baseband signal is pre-distorted relative to the input baseband signal according to the scaled replica, the model distortion signal, and the input baseband signal to compensate for degradations in transmit signal quality due to ET nonlinearities.
Radio frequency system with switch to receive envelope
Aspects of this disclosure relate to a radio frequency system that includes an envelope generator configured to generate an envelope signal corresponding to an envelope of a radio frequency signal and at least two radio frequency components coupled to the envelope generator. One of the radio frequency components is a radio frequency switch configured to pass the radio frequency signal. The radio frequency switch is configured to receive the envelope signal to cause intermodulation distortion associated with the radio frequency switch to be reduced.