Provided is a power amplification module that includes: a first power amplifier that amplifies a first signal and outputs a second signal; and a first noise removing circuit that is inputted with a first voltage supplied from a DC-DC converter, removes noise from the first voltage in order to generate a second voltage, and outputs the second voltage as a power supply voltage of the first power amplifier.

A high-power solid-state RFPA includes an output stage having a power transistor and a current enhanced driver that drives the output stage. The current enhanced driver includes an inductor and first and second transistors arranged in totem-pole-like configuration. When the first transistor is turned on and the second transistor is turned off, the inductor supplies a first charging current to the output stage, to assist in charging the input gate-source capacitor (Cgs) of the power transistor in the output stage. The first transistor further provides a second charging current that supplements the first charging current, thereby enhancing charging of the gate-source capacitor Cgs. Conversely, when the first transistor of the driver is turned off and the second transistor is turned on, the second transistor provides a discharge path through which the gate-source capacitor Cgs can discharge.

This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal () from the output signal and the input signal. In various embodiments the extent to which the error signal () contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).

Provided is a power supply circuit for a wireless mobile device having a plurality of power amplification components. The power supply circuit includes: a first DC-DC converter, for providing at least one constant output voltage (which is provided to the power amplification components) and/or at least one DC intermediate voltage; a second DC-DC converter, for providing a DC component of at least one time-varying output voltage; and at least one linear amplifier. When the at least one linear amplifier receives the at least one DC intermediate voltage from the first DC-DC converter, the at least one linear amplifier provides at least one AC component of the at least one time-varying output voltage. The DC component and the at least one AC component of the at least one time-varying output voltage are combined into the at least one time-varying output voltage and provided to the power amplification components.

A multi-mode envelope tracking (ET) amplifier circuit is provided. The multi-mode ET amplifier circuit can operate in low-resource block (RB) mode and high-RB mode. The multi-mode ET amplifier circuit includes an ET amplifier(s) to amplify a radio frequency (RF) signal(s) to an amplified voltage, low-RB switcher circuitry to generate a direct current (DC) current, and high-RB switcher circuitry to generate an alternating current (AC) current. The amplified voltage, the DC current, and the AC current collectively cause the RF signal to be transmitted at a determined power. A control circuit(s) activates the high-RB switcher circuitry in the high-RB mode to provide the AC current, thus minimizing AC current sourced from the ET amplifier(s). As a result, it is possible to improve efficiency of the ET amplifier(s) and the multi-mode ET amplifier circuit in the high-RB mode and the low-RB mode.

An analog predistorter (APD) core module including a radio frequency delay module, an envelope module, and a contact matrix module. The radio frequency delay module is configured to receive a feed-forward radio frequency signal, generate multiple radio frequency delay signals with different delays according to the feed-forward radio frequency signal, and output each radio frequency delay signal to the contact matrix module. The envelope module is configured to receive the feed-forward radio frequency signal, perform envelope detection on the feed-forward radio frequency signal to obtain multiple envelope signals with different delays, and output each envelope signal to the contact matrix module. The contact matrix module is configured to receive each radio frequency delay signal, each envelope signal, and a predistortion coefficient from an exterior source, and generate a predistortion signal according to the predistortion coefficient, each radio frequency delay signal, and each envelope signal.

A linearization circuit that reduces intermodulation distortion in an amplifier output receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency. The linearization circuit generates an envelope signal based at least in part on a power level of the first signal and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal and the adjusted signal at a second terminal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation products that result from the intermodulation of the first frequency and the second frequency.

Aspects of this disclosure relate to a radio frequency system that includes an envelope generator configured to generate an envelope signal corresponding to an envelope of a radio frequency signal and at least two radio frequency components coupled to the envelope generator. One of the radio frequency components is a radio frequency switch configured to pass the radio frequency signal. The radio frequency switch is configured to receive the envelope signal to cause intermodulation distortion associated with the radio frequency switch to be reduced.

Aspects of this disclosure relate to a switching circuit with enhanced linearity. The switching circuit can include a switch and an envelope generator. The switch can receive an input signal, provide an output signal, and receive an envelope signal corresponding to an envelope of the input signal. The envelope generator can generate the envelope signal so as to cause intermodulation distortion in the output signal to be reduced to cause linearity of the switch to be improved.

A reconfigurable load modulation amplifier having a carrier amplifier and a peak amplifier that are coupled in parallel is disclosed. The peak amplifier provides additional power amplification when the carrier amplifier is driven into saturation. A quadrature coupler coupled between the carrier amplifier and the peak amplifier is configured to combine power from both the carrier amplifier and the peak amplifier for output through an output load terminal. The reconfigurable load modulation amplifier further includes control circuitry coupled to an isolation port of the quadrature coupler and configured to provide adjustable impedance at the isolation port of the quadrature coupler. As such, impedance at the isolation port of the quadrature coupler is tunable such that at least a carrier or peak amplifier is presented with a quadrature coupler load impedance that ranges from around about half an output load termination impedance to around about twice the output load termination impedance.