A power management circuit supporting phase correction in an analog signal is disclosed. The power management circuit includes a power amplifier circuit configured to amplify an analog signal having a time-variant power envelope based on a modulated voltage. The power management circuit also includes an envelope tracking (ET) integrated circuit (ETIC) configured to generate the modulated voltage and a modulated phase correction voltage to thereby cause a phase change in the analog signal. In embodiments disclosed herein, a correlation between the time-variant power envelope, the modulated voltage, and the modulated phase correction voltage is explored to thereby allow the ETIC to generate the modulated voltage and the modulated phase correction voltage based on the time-variant power envelope. As a result, it is possible to enable good time and phase alignment between the modulated voltage and the time-variant power envelope to thereby improve efficiency and linearity of the power amplifier circuit.

A tracker circuit is provided that includes a supply modulator to selectively output at least one of a plurality of discrete voltages to a power amplifier, and a filter circuit connected between the supply modulator and the power amplifier. The filter circuit includes an inductor connected between the supply modulator and the power amplifier, a capacitor connected between ground and a path connecting the inductor and the power amplifier, and a switch connected between the supply modulator and the power amplifier without via the inductor.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

A power management circuit supporting phase correction in an analog signal with reduced physical pins is disclosed. The power management circuit includes a power amplifier circuit configured to amplify an analog signal having a time-variant power envelope based on a modulated voltage. The power management circuit also includes an envelope tracking integrated circuit (ETIC) configured to generate the modulated voltage and a modulated phase correction voltage to thereby cause a phase change in the analog signal. The ETIC receives a modulated differential signal that includes a common signal and a differential signal and generates the modulated phase correction voltage and the modulated voltage based on the common signal and the differential signal, respectively. By modulating the common signal and the differential signal into the modulated differential signal, it is possible to reduce physical pins in the ETIC to thereby reduce cost and footprint of the power management circuit.

An ET module is provided that includes a laminate having a rectangular shape; first and second external output terminals on the module laminate; and a voltage supply circuit that supplies a power supply voltage V.sub.ETA to a first PA module via the first external output terminal and also simultaneously supplies a power supply voltage V.sub.ETA to a second PA module via the second external output terminal. The module laminate has first and second sides that form at least a part of an outer shape of the laminate. The first external output terminal is adjacent to the first side, and the second external output terminal is adjacent to the second side. In a plan view of the module laminate, the first and second external output terminals are disposed asymmetrically with respect to a line passing through a midpoint M of the module laminate and parallel to the first and second sides.

An ET module is provided that includes a module laminate; a first external output terminal and a second external input terminal disposed on the module laminate; and a voltage supply circuit disposed on the module laminate and configured to supply a voltage based on an envelope signal to a PA module through the first external output terminal. The second external input terminal is connected to a first path that connects the first external output terminal to the PA module. The second external input terminal and the first external output terminal are disposed adjacent to each other.

An ET module is provided that includes a module laminate; first and second external output terminals disposed on the module laminate (90); and a voltage supply circuit disposed on the module laminate and configured to supply a power supply voltage V.sub.ETA based on an envelope signal to a PA module via the first external output terminal, and to simultaneously supply a power supply voltage V.sub.ETB based on an envelope signal to a PA module via the second external output terminal. The module laminate has first and second sides adjacent to each other, the first side and the second side forming at least a part of an outer shape of the module laminate in a plan view thereof. The first external output terminal is disposed adjacent to the first side, and the second external output terminal is disposed adjacent to the second side but not the first side.

Low power radio frequency (RF) receivers and related circuits are described.

A power supply switch circuit includes: a first switch to switch supply of a first power supply voltage to a power supply terminal of a power amplifier; a control voltage generator to generate a first control voltage through a charge pump operation, and to control the charge pump operation by comparing the first power supply voltage to a first voltage, which is a voltage of the power supply terminal; and a switch controller to generate a switching driving signal to control the first switch using the first control voltage.

A radio frequency circuit includes a power amplifier configured to selectively amplify one of a first radio frequency signal and a second radio frequency signal that have different bandwidths, and when the first radio frequency signal is input to the power amplifier, a first bias signal is applied to the power amplifier, and when the second radio frequency signal is input to the power amplifier, a second bias signal different from the first bias signal is applied to the power amplifier.