An ultrasonic sensing system includes: an amplifier including an input and an output; and an n-level comparator, coupled to the output of the amplifier, to compare an adjustable threshold voltage to an output signal from the output of the amplifier. N is greater than or equal to 1. The system also includes a noise power estimator, coupled to an output of the n-level comparator, to generate a noise power signal indicative of noise power of an input signal at the input of the amplifier. The system further includes a time-varying threshold circuit, coupled to the noise power estimator and the n-level comparator, to adjust the adjustable threshold voltage based on the noise power signal.

A multi-radio access technology (RAT) envelope tracking (ET) amplifier apparatus is provided. The multi-RAT ET amplifier apparatus may be configured to enable concurrent communication of at least two radio frequency (RF) signals associated with at least two different RATs. Specifically, the multi-RAT ET amplifier apparatus includes an ET integrated circuit (IC) (ETIC) and a distributed ETIC (DETIC) configured to generate respective ET voltages for amplifying the two RF signals. In addition, the DETIC can be configured to utilize certain circuit(s) in the ETIC to help reduce a footprint of the DETIC. By amplifying the two different RF signals based on the respective ET voltages and sharing certain circuit(s) between the ETIC and the DETIC, it may be possible to improve overall efficiency and heat dissipation in the multi-RAT ET amplifier apparatus concurrent to reducing the footprint of the DETIC.

An envelope tracking (ET) apparatus is provided. The ET apparatus includes an amplifier array(s) configured to amplify a radio frequency (RF) signal(s) based on an ET voltage(s). The ET apparatus also includes a distributed voltage amplifier (DVA) circuit(s), which may be co-located with the amplifier array(s) to help reduce trace inductance between the DVA circuit(s) and the amplifier array(s), configured to generate the ET voltage(s) based on an ET target voltage(s). The ET apparatus further includes a signal processing circuit configured to receive an analog signal(s) corresponding to the RF signal(s) and generates the ET target voltage(s) based on the analog signal. By employing a single signal processing circuit to generate the ET target voltage(s) for the amplifier array(s), it may be possible to reduce a footprint of the ET apparatus without compromising efficiency and/or increasing heat dissipation of the amplifier array(s).

This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.

Doherty radio frequency (RF) amplifier circuitry includes an input node, an output node, a main amplifier path, and a peaking amplifier path. The main amplifier path is coupled between the input node and the output node and includes a main amplifier. The peaking amplifier path is coupled in parallel with the main amplifier path between the input node and the output node, and includes a peaking amplifier and a peaking variable gain preamplifier between the input node and the peaking amplifier. The peaking variable gain preamplifier is configured to adjust a current provided to the peaking amplifier.

A power amplification apparatus, a remote radio unit, and a base station are provided to improve power amplification efficiency. The power amplification apparatus includes an envelope modulator, a main power amplifier, and a first auxiliary power amplifier. The envelope modulator is configured to obtain an envelope voltage based on a received envelope signal and output the envelope voltage to the drain of the main power amplifier. The main power amplifier is connected to the envelope modulator and configured to use the envelope voltage as an operating voltage, and is connected to the first auxiliary power amplifier, to output the envelope voltage to a drain of the first auxiliary power amplifier. The first auxiliary power amplifier is configured to use the envelope voltage received from the main power amplifier as an operating voltage.

A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

Systems, circuitries, and methods for predistorting a digital signal in a transmit chain based on a predistortion function are provided. A method includes shifting a center frequency of an input signal by an offset to generate an adapted signal; predistorting the adapted signal based on a predistortion function to generate a predistorted adapted signal; reverting the shifting of the center frequency of the predistorted adapted signal by the offset to generate a predistorted signal; and causing transmission of the predistorted signal by a transmit chain.

Fast envelope tracking systems are provided herein. In certain embodiments, an envelope tracking system for a power amplifier includes a switching regulator and a differential error amplifier configured to operate in combination with one another to generate a power amplifier supply voltage for the power amplifier based on an envelope of a radio frequency (RF) signal amplified by the power amplifier. The envelope tracking system further includes a differential envelope amplifier configured to amplify a differential envelope signal to generate a single-ended envelope signal that changes in relation to the envelope of the RF signal. Additionally, the differential error amplifier generates an output current operable to adjust a voltage level of the power amplifier supply voltage based on comparing the single-ended envelope signal to a reference signal.