An uplink multiple input-multiple output (MIMO) transmitter apparatus using transmit diversity uses transmit diversity signals that are modified to create intermediate orthogonal signals. A transceiver circuit in the transmitter apparatus includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from the intermediate orthogonal signals. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals correspond to the two original transmit diversity signals but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals.

Disclosed is envelope tracking circuitry having an envelope tracking integrated circuit (ETIC) coupled to a power supply to provide an envelope tracked power signal to a power amplifier (PA) with a filter equalizer configured to inject an error-correcting signal into the ETIC in response to equalizer settings. Further included is PA resistance estimator circuitry having a first peak detector circuit configured to capture within a window first peaks associated with a sense current generated by the ETIC, a second peak detector circuit configured to capture within the window second peaks associated with a scaled supply voltage corresponding to the envelope tracked power signal, comparator circuitry configured to receive the first peaks and receive the second peaks and generate an estimation of PA resistance, and an equalizer settings correction circuit configured to receive the estimation of PA resistance and update the equalizer settings in response to the estimation of PA resistance.

An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

A supply modulator includes a linear regulator that generates an output voltage in an envelope tracking mode. A switching regulator operates with the linear regulator to generate the output voltage in the envelope tracking mode and to selectively generate the output voltage in an average power tracking mode. A single inductor multiple output converter operates selectively with the switching regulator to generate the output voltage in the average power tracking mode, operates to provide a power supply voltage to the linear regulator in the envelope tracking mode, and includes a first capacitor connected with a power supply terminal of the linear regulator and a second capacitor selectively connected with an output terminal of the linear regulator through a first switch. A main controller decides a tracking mode to be executed by the supply modulator.

A power amplifier circuit includes a power amplifier including a first transistor having a first terminal connected to a reference potential, a second terminal to which a first current and a radio-frequency signal are input, and a third terminal connected to a first power supply potential via a first inductor; a capacitor connected to the third terminal of the first transistor; a second transistor including a first terminal connected to the capacitor and the reference potential via a second inductor, a second terminal to which a second current is input and is connected to the reference potential, and a third terminal connected to the first power supply potential via a third inductor and outputs signal; and an adjustment circuit that outputs a third current corresponding to the first power supply potential or a second power supply potential to the second terminal of the second transistor.

The present invention relates to circuitry comprising: interpolation filter circuitry configured to receive a digital input signal and to output an interpolated digital signal; amplifier circuitry configured to generate an output signal based on the interpolated digital signal; and protection circuitry. The protection circuitry is configured to activate in response to detection of a fault condition at an output of the amplifier circuitry. The circuitry further comprises first detection circuitry configured to output a control signal to disable the protection circuitry on detection of a transient signal at an output of the interpolation filter circuitry that is unrelated to a fault.

A radio frequency signal having a constant amplitude is modulated by a digital modulation signal and a radio frequency input signal whose amplitude changes stepwise is generated. The radio frequency input signal is input into a power amplifier that is an evaluation target. A period in which an amplitude of the radio frequency input signal is constant is defined as a measurement period and an output signal of the power amplifier is measured in each of measurement periods in which amplitudes of the radio frequency input signal are different from each other.

A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

A device for digital envelope tracking with dynamically changing voltage levels for a radio frequency (RF) power amplifier is disclosed. A power management unit generates a set of supply voltages for a power amplifier based on a control signal. A setpoint generator in the power management integrated circuit gradually increases or decreases a target voltage such that the set of supply voltages output from the voltage converter gradually increase or decrease in response to a gradual transition of the target voltage. A transceiver includes digital models for replicating a behavior of the setpoint generator and a voltage regulator in the voltage converter such that a signal pre-distortion unit may use an instantaneous voltage level for signal predistortion.