An amplifier circuit includes a voltage-to-current conversion circuit and a current-to-voltage conversion circuit. The voltage-to-current conversion circuit generates a current signal according to an input voltage signal, and includes an operational transconductance amplifier (OTA) used to output the current signal at an output port of the OTA. The current-to-voltage conversion circuit generates an output voltage signal according to the current signal, and includes a linear amplifier (LA), wherein an input port of the LA is coupled to the output port of the OTA, and the output voltage signal is derived from an output signal at an output port of the LA.

A method comprising: obtaining a first radio signal and a second radio signal, determining a first envelope signal based on the first radio signal and a second envelope signal based on the second radio signal, determining a preview envelope signal based on the first envelope signal and the second envelope signal, determining a common clipping gain signal based on the preview envelope signal, determining a first clipping gain signal based on the common clipping gain signal and a first weighing factor, determining a second clipping gain signal based on the common clipping gain signal and a second weighing factor, performing a first crest factor reduction for the first radio signal utilizing the first clipping gain signal, and performing a second crest factor reduction for the second radio signal utilizing the second clipping gain signal.

Doherty radio frequency (RF) amplifier circuitry includes an input node, an output node, a main amplifier path, and a peaking amplifier path. The main amplifier path is coupled between the input node and the output node and includes a main amplifier. The peaking amplifier path is coupled in parallel with the main amplifier path between the input node and the output node, and includes a peaking amplifier and a peaking variable gain preamplifier between the input node and the peaking amplifier. The peaking variable gain preamplifier is configured to adjust a current provided to the peaking amplifier.

Envelope tracking systems for power amplifiers are provided herein. In certain embodiments, an envelope tracker is provided for a power amplifier that amplifies an RF signal. The envelope tracker includes an error amplifier that controls a voltage level of a power amplifier supply voltage of the power amplifier based on amplifying a difference between a reference signal and an envelope signal indicating an envelope of the RF signal. The envelope tracker further includes a multi-level switching circuit that generates an error amplifier supply voltage based on sensing a current of the error amplifier, and uses the error amplifier supply voltage to power the error amplifier.

An envelope tracking system is disclosed having an envelope tracking integrated circuit (ETIC) with a first tracker having a first supply output and a second tracker having a second supply output, wherein the ETIC has a first mode in which only one of the first and second trackers supplies voltage and a second mode in which the first and second trackers both supply voltage. A first notch filter is coupled to the first supply output and a second notch filter is coupled to the second supply output. A mode switch coupled between the first supply output and the second supply output is configured to couple the first notch filter and the second notch filter in parallel in the first mode and open the mode switch to decouple the first notch filter from the second notch filter in the second mode in response to first and second switch control signals, respectively.

Systems and methods are described for a power amplifier with a tracking power supply. The power amplifier may use envelope tracking. The power amplifier is protected when the output of the power amplifier is short circuited or overloaded.

A dual-input envelope tracking (ET) integrated circuit (ETIC) and related apparatus are provided. The dual-input ETIC includes an ET voltage circuit configured to generate an ET voltage based on an ET voltage and a first set of parameters. The ET voltage may be provided to a power amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) in an ET power range. The dual-input ETIC also includes a target voltage processing circuit configured to generate the ET target voltage based on a second set of parameters. The dual-input ETIC further includes a control circuit configured to determine the first set of parameters and the second set parameters based at least on the ET power range of the power amplifier circuit(s). As such, it may be possible to optimize the dual-input ETIC performance in a wide-range of modulation bandwidth, thus helping to improve linearity and efficiency of the power amplifier circuit(s).

A power management integrated circuit (PMIC) can improve the ramp up speed of a boost converter with the inclusion of a controllable switch that may modify the connection of an output capacitor to reduce the ramp time as the output voltage is ramping to a desired boost setpoint. The switch may be controlled using jump start logic to switch a first plate or terminal of the output capacitor from a ground connection to a voltage supply connection. Once a threshold voltage is reached, the first plate of the capacitor may be switched from the supply voltage to ground. In certain cases, by switching the connection of the output capacitor between ground and a supply voltage based on one or more threshold voltages or a boost setpoint, the time to ramp from an initial voltage to a desired boost setpoint may be reduced.

An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC includes a number of ET circuits configured to generate a number of ET voltages based on a number of ET target voltages, respectively. In examples discussed herein, a selected ET circuit among the ET circuits is configured to generate a respective ET voltage based on a maximum ET target voltage among the ET target voltages. In this regard, the respective ET voltage generated by the selected ET circuit can be used as a reference ET voltage for the rest of the ET circuits in the ETIC. As a result, it may be possible to opportunistically turn off or reduce functionality of one or more other ET circuits in the ETIC, thus helping to reduce peak battery current and improve heat dissipation in an ET amplifier apparatus incorporating the ETIC.

A power management integrated circuit (PMIC) can improve the ramp up speed of a boost converter with the inclusion of a controllable switch that may modify the connection of an output capacitor to reduce the ramp time as the output voltage is ramping to a desired boost setpoint. The switch may be controlled using jump start logic to switch a first plate or terminal of the output capacitor from a ground connection to a voltage supply connection. Once a threshold voltage is reached, the first plate of the capacitor may be switched from the supply voltage to ground. The PMIC may further include a quick start assembly that can drive the boost converter at a high duty-cycle.