Patent classifications
H03F2200/102
Repeater for Relaying Telecommunications Signals
A repeater (10) for relaying telecommunication signals (20) between a base station (30) and a plurality of mobile users (40) is disclosed. The repeater (10) comprises a down converter (110) for converting the telecommunications signals (20) to an intermediate frequency (IF) from a transmission frequency and an up converter (150) for converting the telecommunication signals (20) from an intermediate frequency to the transmission frequency. An IF beamforming processor network (210) arranged between the downconverter (111) and the up converter (150). The IF beamforming processor network (210) comprises a first phase shifter network (310; 320) for phase shifting down converted telecommunications signals (202; 222), a second phase shifter network (320) for phase shifting telecommunications signals on the downlink; and a coupler (230) arranged between the first phase shifter network (310) and the second phase shifter network (320; 310), the coupler (330) being adapted for coupling a portion of the phase shifted down converted telecommunications signals and providing control signals to the first phase shifter network (310) based on signal power.
MODULATED POWER APPARATUS
An apparatus that includes a tracking amplifier having an amplifier output terminal coupled to an output voltage node and an envelope input terminal configured to receive an envelope signal of a radio frequency signal is disclosed. A multi-level voltage converter has a switched voltage terminal coupled to the output voltage node and a converter control input terminal configured to receive a converter control signal. A control signal multiplexer has a converter control output terminal coupled to the converter control input terminal, a first converter signal input terminal configured to receive a first converter control signal corresponding to a lower envelope modulation bandwidth, a second converter signal input terminal configured to receive a second converter control signal corresponding to a higher envelope modulation bandwidth, and a converter control signal selector terminal configured to receive a control selector signal for selecting between the first and second converter control signals.
ELECTRONIC CIRCUIT AND METHOD OF CONTROLLING THREE-LEVEL SWITCHING CONVERTERS
A method including producing an electronic circuit. The method can include providing a first circuit portion, a second circuit portion, a flying capacitor voltage comparator, an output switching circuit, an electronic circuit first output node, and/or an electronic circuit second output node. The electronic circuit first output node can be electrically coupled to a first gate terminal of a switching converter. The electronic circuit second output node can be electrically coupled to a second gate terminal of the switching converter. The method also can include electrically coupling a voltage sensor output terminal of the flying capacitor voltage comparator to the first circuit second input node of the first circuit portion and the second circuit second input node of the second circuit portion. Other embodiments are disclosed.
SUB-HARMONIC SWITCHING POWER AMPLIFIER
A subharmonic switching digital power amplifier system includes a power amplifier core that includes at least one power amplifier operable in a power back-off region and a power supply providing at least one operating voltage to the power amplifier. Characteristically, the power amplifier is toggled at a subharmonic component of a carrier frequency (Fc) to achieve power back-off wherein the power amplifier is operated in a voltage mode or current mode driver. Multi-subharmonics can be used to further enhance the power back-off efficiency. A switching digital power amplifier system employing phase interleaving is also provided.
High-frequency signal processing apparatus and wireless communication apparatus
A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.
Fiber-optic node with forward data content driven power consumption
Methods and systems for modulating an amplifier power supply to efficiently attain amplified RF output power with much lower power dissipation than existing amplifiers. In a cable television (CATV) network, a processor receives a signal to be amplified by an amplifier at a location remote from the processor. A bias point of the amplifier may be variably modulated based on peaks of an input signal to reduce amplifier dissipation.
Series voltage regulation modulating power supply
Certain aspects of the present disclosure provide methods and apparatus for series voltage regulation in an envelope tracking modulated supply. One example of an envelope tracking modulated supply includes a switched-mode power supply (SMPS), a voltage regulator, and a power amplifier having a supply input coupled to an output of the first voltage regulator. In certain aspects, the first voltage regulator is coupled in series between the power amplifier and two or more outputs the SMPS and is configured to generate a voltage at the output of the first voltage regulator based on an envelope of a signal to be amplified by the first power amplifier.
Control of envelope tracker PMIC
A tracker circuit configured to provide a variable supply voltage to a power amplifier (PA) circuit is disclosed. The tracker circuit includes a state machine circuit comprising a plurality of states mapped in accordance with transitions associated with a mapping scheme. In some embodiments, the plurality of states of the state machine circuit identify one or more operational modes associated with the tracker circuit, wherein at least one operational mode comprises one or more voltage levels respectively associated therewith. In some embodiments, the one or more operational modes includes at least two active operational modes. In some embodiments, a transition between the one or more operational modes of the tracker circuit is controlled by a digital selection signal received from a digital communication interface associated therewith.
ADAPTIVE FREQUENCY EQUALIZER FOR WIDE MODULATION BANDWIDTH ENVELOPE TRACKING
An adaptive frequency equalizer for wide modulation bandwidth envelope tracking (ET) is provided. In this regard, an ET integrated circuit (ETIC) provides an ET power signal for one or more power amplifiers (PAs). A voltage error can occur in the ET power signal due to variable impedance sources, such as a variable load impedance at the PA and a variable trace inductance between the ETIC and the PA. The adaptive frequency equalizer disclosed herein works to adaptively correct for such voltage errors to provide improved overall power signal tracking at the PA, especially where there is a large trace inductance from the ETIC being located several centimeters (cm) away from the PA. Thus, embodiments of the adaptive frequency equalizer enhance ET performance for radio frequency (RF) systems having a modulation bandwidth of 100 megahertz (MHz) or above.
DUAL-INPUT ENVELOPE TRACKING INTEGRATED CIRCUIT AND RELATED APPARATUS
A dual-input envelope tracking (ET) integrated circuit (ETIC) and related apparatus are provided. The dual-input ETIC includes an ET voltage circuit configured to generate an ET voltage based on an ET voltage and a first set of parameters. The ET voltage may be provided to a power amplifier circuit(s) for amplifying a radio frequency (RF) signal(s) in an ET power range. The dual-input ETIC also includes a target voltage processing circuit configured to generate the ET target voltage based on a second set of parameters. The dual-input ETIC further includes a control circuit configured to determine the first set of parameters and the second set parameters based at least on the ET power range of the power amplifier circuit(s). As such, it may be possible to optimize the dual-input ETIC performance in a wide-range of modulation bandwidth, thus helping to improve linearity and efficiency of the power amplifier circuit(s).