Apparatus and methods for biasing power amplifiers are provided herein. In certain embodiments, a power amplifier includes a bipolar transistor having a base biased by a bias network having a reactance that controls an impedance at the transistor base to achieve substantially flat phase response over large dynamic power levels. For example, the bias network can have a frequency response, such as a high-pass or band-pass response, that reduces the impact of power level on phase distortion (AM/PM).

There is provided a technique for calibrating the envelope tracking circuitry of the wireless interface of an electronic device to compensate for any delay mismatch between the IQ signal path and the envelope path. The desired levels of input test signals are determined to assure that they are sensitive to any delay mismatch which may be in the system. The propagation delay from the signal generator to the signal analyzer of the envelope tracking system is estimated and delay compensation is performed. To reduce the noise of the measurement, distortion in the received signal may also be determined and noise compensation may also be performed. Based on these determinations, the envelope tracking circuitry may be calibrated by introducing an appropriate delay in either the envelope path or the IQ signal path.

Systems and methods are provided for improved noise performance of audio amplifiers. In one example, a system includes a multistage amplifier comprising at least a first stage amplifier and a second stage amplifier. The system further includes a plurality of switches disposed within the multistage amplifier to configure the multistage amplifier. The system further includes a control signal configured to control the multistage amplifier to a normal amplification mode or a mute state, wherein the multistage amplifier is adapted to amplify an input signal in the normal amplification mode, the multistage amplifier is adapted to output a zero signal in the mute state, and internal amplification stages of the multistage amplifier are disabled in the mute state, and output stages of each of the at least first stage amplifier and the second stage amplifier are electrically shorted and/or shorted to a fixed bias voltage in the mute state.

A power supply circuit supplies a variable voltage to a power amplifier that amplifies a radio-frequency signal, and includes a transistor and a current detecting resistor. The transistor includes a collector or drain that is supplied with a fixed voltage from a fixed voltage source, a base or gate that receives an envelope signal tracking an envelope of the radio-frequency signal, and an emitter or source that outputs the variable voltage that is based on the envelope signal. The current detecting resistor is electrically connected between the fixed voltage source and the collector or drain of the transistor.

This application relates to audio driving circuits having good audio performance. The circuit (301) has a forward signal path between an input (103) for receiving an input audio signal (S.sub.IN) and an output (104) for outputting an output signal (S.sub.OUT) with an amplifier module (102) in the forward signal path. An error block (302) is arranged to receive a first signal (S.sub.FF) derived from the input signal and also a second signal (S.sub.FB) derived from the output signal and determine a first error signal (.sub.1) indicative of a difference between the first and second signals. A first processing module (204) is operable to generate a compensation signal (S.sub.C) to be applied to the input signal (S.sub.IN) upstream of the amplifier module (102) based on the first error signal. The error block (302) comprises a second processing module (303/303a) configured to apply a linear transfer function to one of the first signal or the second signals prior to determining the first error signal. In some embodiments the second processing module may apply a linear transfer function which is adaptive based on a second error signal (.sub.2) indicative of the error between the first and second signals after the linear transfer function has been applied.

A source follower with an input node and an output node includes a first transistor, a second transistor, and a DC (Direct Current) tracking circuit. The first transistor has a control terminal, a first terminal coupled to a first node, and a second terminal coupled to a second node. The second transistor has a control terminal, a first terminal coupled to a ground voltage, and a second terminal coupled to the first node. The DC tracking circuit sets the second DC voltage at the second node to a specific level. The specific level is determined according to the first DC voltage at the first node. The output node of the source follower is coupled to the first node.

Power amplification system with adaptive bias control. In some embodiments a power amplification system includes a power amplifier including a radio-frequency (RF) input terminal for receiving an RF signal, an RF output terminal for providing an amplified RF signal, a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals, at least one of the one or more bias signals being based on the power amplifier supply voltage.

Some embodiments include apparatus and methods for using a direct-current to direct-current (DCDC) converter and a control unit coupled to the DCDC converter. The DCDC converter includes a first node to receive an input signal, a second node to couple to a terminal of an inductor, and a third node to couple to an output node. The DCDC converter includes a driver controlled by a signal. The control unit is arranged to generate control information based on a duty cycle of the signal to control the duty cycle range of the signal.

This disclosure provides systems, methods and apparatuses for characterizing and operating a power amplifier. Before being placed into operation, output phase and output gain characteristics of the power amplifier may be determined over various operating conditions including varying two independent control signals and a supply voltage. The output phase and output gain characteristics may be stored for later retrieval. The power amplifier may be operated by determining a control signal profile for the two independent control signals based on operating conditions and radio-frequency (RF) envelope information associated with an input signal received by the power amplifier. The independent control signals may be generated in accordance with the control signal profile.

An envelope tracking (ET) integrated circuit (IC) (ETIC) is provided. The ETIC includes a number of ET circuits coupled to a number of amplifier circuits configured to amplify a radio frequency signal based on a number of ET voltages, respectively. The ET circuits are configured to generate the ET voltages based on a number of ET target voltages, respectively. The ETIC includes a reference ET circuit configured to generate a reference ET voltage based on a maximum ET target voltage among the ET target voltages. A selected ET circuit(s) among the ET circuits may be configured to not generate a respective ET voltage(s) but instead forward the reference ET voltage to a respective amplifier circuit(s) as the respective ET voltage(s). Hence, it may be possible to partially or completely turn off the selected ET circuit(s) to help reduce peak battery current and improve heat dissipation in an ET amplifier apparatus.