Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Embodiments of radio frequency (RF) systems include a transmit/receive switch integrated with one or more power amplifiers and/or other components. The power amplifiers can have transformer-based architectures, and a power amplifier and switch can be integrated onto a single complementary metal oxide semiconductor die.

Quadrature amplifier having envelope control. In some embodiments, an amplifier system can include a quadrature amplifier having first and second amplifiers configured to amplify first and second signals in quadrature relative to each other, with each of the first and second amplifiers including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the quadrature amplifier and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers.

A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.

A low-power wake-up receiver. The receiver includes a transformer/filter resonating at a pre-selected frequency to realize passive RF voltage gain. A pseudo-balun envelope detector is coupled to an output of the transformer filter. A comparator or other quantizer is coupled to an output of the active pseudo-balun envelope detector (ED) for comparing the ED output to a comparison threshold voltage. The pseudo-balun envelop detector can be an active detector. The pseudo-balun detector can also be a passive detector.

A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

A power amplifier circuit includes a first transistor having a base to which a radio frequency (RF) signal is supplied and a collector to which a variable power-supply voltage corresponding to a level of the RF signal is supplied, and being configured to amplify the RF signal; a bias circuit including a second transistor configured to supply a bias current to the base of the first transistor; and an adjustment circuit configured to cause the bias current to be supplied to the base of the first transistor to decrease with decrease in the variable power-supply voltage by causing a current to be supplied to a base of the second transistor to decrease.

Doherty amplifier having envelope control. In some embodiments, an amplifier system can include a Doherty amplifier having a carrier amplifier and a peaking amplifier, with each of the carrier amplifier and the peaking amplifier including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the Doherty amplifier and configured to provide a bias signal to the output transistor of the cascode stage of the peaking amplifier.

A speaker, a television provided with the speaker and a multimedia device are provided. The speaker includes a box body and a plurality of transducer units installed within the box body by means of parallel connection: front sound cavities of the plurality of transducer units are independent of each other, respectively; and the plurality of transducer units share one back sound cavity. The speaker possesses such advantages that it has a high sound pressure level output and a smaller power consumption, it is usable to reduce the back-cavity acoustic resistance, and it is usable to raise the lower frequency limit in the low frequency range.

A supply modulator includes: a voltage generator including output terminals respectively outputting voltages having different levels, and configured to select, in response to a selection control signal corresponding to an envelope signal, at least one of the voltages as a selection supply voltage and to generate the selection supply voltage by performing DC-DC conversion on a power supply voltage; and a switch unit configured to connect an output terminal through which the selection supply voltage is output to a power amplifier, in response to a connection control signal corresponding to the envelope signal.