A method includes determining one or more characteristics of a system that uses a power amplifier. The method also includes determining, based on the one or more determined characteristics, a switching speed and a supply voltage for the power amplifier. The method further includes modulating a power supply of the power amplifier according to the determined switching speed and supply voltage.

A load-insensitive power amplifier power detector that excludes the use of couplers is disclosed. The load-insensitive power amplifier power detector may include a voltage sampling circuit in electrical communication with a collector of a power amplifier and configured to sample a first voltage from the power amplifier. The load-insensitive power amplifier power detector may include a current sampling circuit in electrical communication with the collector of the power amplifier and configured to sample an output current from the power amplifier. Further, the load-insensitive power amplifier power detector may include a current-to-voltage converter connected between the voltage sampling circuit and an output of the load-insensitive power amplifier power detector. The current-to-voltage converter may be configured to convert the output current to obtain a second voltage. Moreover, a combination of the first voltage and the second voltage may form a detector voltage corresponding to an incident power of the power amplifier.

Apparatus and methods for power amplifier bias modulation for low bandwidth envelope tracking are provided herein. In certain embodiments, a power amplifier system for a mobile device includes a power amplifier that amplifies an RF signal and a low bandwidth envelope tracker that generates a power amplifier supply voltage for the power amplifier based on an envelope of the RF signal. The envelope tracking system further includes a bias modulation circuit that modulates a bias signal of the power amplifier based on a voltage level of the power amplifier supply voltage.

A method for predistorting an input signal of an amplifier device comprises evaluating a selection criterion for a computational model of the amplifier device. The computational model provides an output signal of the amplifier device for the input signal of the amplifier device. Further, the method comprises selecting between a first computational model of the amplifier device and a second computational model of the amplifier device based on the evaluated selection criterion. Additionally, the method comprises predistorting the input signal of the amplifier device using the selected computational model.

A circuit includes a transformer having a primary coil coupled to a first power amplifier (PA) and a second PA, and a secondary coil. The secondary coil supplies a current to an antenna based on a first direction of a first phase of a first amplified constant-envelope signal in the primary coil with respect to a second phase of a second amplified constant-envelope signal in the primary coil. The circuit further includes load impedance coupled between a median point of the primary coil and ground. The load impedance is adjusted to match one of an impedance of the differential antenna, an impedance of the first PA, and an impedance of the second PA, based on the ripples detected by the ripple detector.

Power amplifiers with adaptive bias for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that controls a voltage level of the power amplifier supply voltage based on an envelope of the RF signal. The power amplifier includes a current mirror having an input that receives a reference current, an output electrically connected to the power amplifier supply voltage, and a node that outputs a gate bias voltage. The power amplifier further includes a field-effect transistor that amplifies the radio frequency signal and a first depletion-mode transistor having a gate connected to the node of the current mirror and a source connected to a gate of the field-effect transistor.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Equalizer circuitry includes a differential target voltage input, an equalizer output, a first operational amplifier, and a second operational amplifier. The differential target voltage input includes a target voltage input node and an inverted target voltage input node. The first operational amplifier and the second operational amplifier are coupled in series between the differential target voltage input and the equalizer output. The first operational amplifier is configured to receive a target voltage signal and provide an intermediate signal based on the target voltage input signal. The second operational amplifier is configured to receive the intermediate signal and an inverted target voltage signal and provide an output signal to the equalizer output. The first operational amplifier and the second operational amplifier are interconnected with one or more passive components such that a transfer function between the differential target voltage input and the equalizer output is a second-order complex-zero function.

A transmission module includes n oscillator modules and a phase command signal generator. Each of the oscillator modules includes a voltage controlled oscillator and an amplification circuit. The voltage controlled oscillators output transmission high-frequency signals having the same frequency and synchronized among the n oscillator modules by synchronous control based on a common reference signal. The amplification circuits each perform power amplification for the transmission high-frequency signal from a corresponding one of the voltage controlled oscillators and output the resultant signal. Phases of the transmission high-frequency signals synchronized among the n oscillator modules and output from the voltage controlled oscillators are separately controlled according to respective n phase command signals from the phase command signal generator.

Class D amplifier circuitry comprising: input buffer circuitry configured to receive a first digital input signal modulated according to a first modulation scheme in which the digital input signal can take a first plurality N of discrete signal levels; analog modulator circuitry configured to generate an analog modulated signal based on an analog output signal output by the input buffer circuitry; and quantizer circuitry configured to generate an output signal based on the analog modulated signal, wherein the output signal is modulated according to a second modulation scheme in which the output signal can take a second plurality M of discrete signal levels, wherein the second plurality M is greater than the first plurality N.