A reconfigurable power detector is described. The reconfigurable power detector includes a first power detector circuit. The first power detector circuit includes a pair of coupled first-type transistors to switch a first-type positive output and a first-type negative output. The reconfigurable power detector includes a second power detector circuit. The second power detector circuit includes a pair of coupled second-type transistors to switch a second-type positive output and a second-type negative output. The reconfigurable power detector includes a switch matrix. The switch matrix includes switches to select the second-type positive output and the second-type negative output in a first configuration, the first-type positive output and the first-type negative output in a second configuration, and the first-type positive output and the second-type positive output in a third configuration. The reconfigurable power detector also includes a configuration block to program the switches to select an output configuration at a detector output.

A supply modulator including a multiple output voltage regulator (MOVR) configured to output voltages in a discrete level-envelope tracking mode (DLETM) having different levels from each other respectively corresponding to reference output voltage signals, a switching regulator configured to output a switching regulator voltage, an output voltage being based on the switching regulator voltage and a selected voltage among the voltages in the DLETM and based on the switching regulator voltage in an average power tracking mode, a switching regulator controller configured to sense an output current of the MOVR to obtain a sensing value, and control the switching regulator based on the sensing value in the DLETM, a switch array comprising switches respectively corresponding to the voltages and configured to selectively connect the selected voltage to a power amplifier by performing a switching operation, and a switch controller configured to control the switching operation.

An average power tracking (APT) power management circuit is provided. The APT power management circuit is configured to generate a first APT voltage(s) for a first power amplifier(s) and a second APT voltage(s) for a second power amplifier(s). The APT power management circuit further includes a pair of switcher circuits that can generate a pair of reference voltages. Depending on various operating scenarios of the APT power management circuit, it is possible to selectively output any of the reference voltages as any one or more of the first APT voltage(s) and the second APT voltage(s). As such, it is possible to flexibly configure the APT power management circuit to support the various operating scenarios based on a minimum possible number of the switcher circuits, thus helping to reduce footprint and cost of the APT power management circuit.

Envelope tracking power amplifiers with advanced gain shaping are provided. In certain implementations, a power amplifier system includes a power amplifier that amplifies a radio frequency (RF) signal and an envelope tracker that controls a voltage level of a supply voltage of the power amplifier based on an envelope of the RF signal. The power amplifier system further includes a gain shaping circuit that generates a gain shaping current that changes with the voltage level of the supply voltage from the envelope tracker. For example, the gain shaping circuit can include an analog look-up table (LUT) mapping a particular voltage level of the supply voltage to a particular current level of gain shaping current. Additionally, the gain shaping circuit biases the power amplifier based on the gain shaping current.

Power amplifiers with adaptive bias for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that generates the power amplifier supply voltage based on an envelope of the RF signal. The power amplifier includes a field-effect transistor (FET) for amplifying the RF signal, and a current mirror including an input that receives a reference current and an output connected to the power amplifier supply voltage. An internal voltage of the current mirror is used to bias the gate of the FET to compensate the FET for changes in the power amplifier supply voltage arising from envelope tracking.

Composite cascode power amplifiers for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a composite cascode power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that generates the power amplifier supply voltage based on an envelope of the RF signal. The composite cascode power amplifier includes an enhancement mode (E-MODE) field-effect transistor (FET) for amplifying the RF signal and a depletion mode (D-MODE) FET in cascode with the E-MODE FET.

A digital envelop tracker for a power amplifier. The digital envelop tracker includes a supply filter for filtering a supply voltage to a power amplifier, a level selection circuitry configured to determine a level of supply voltage based on an instantaneous power of an input data stream, schedule a series of switching events based on the determined level of supply voltage, and generate a level select signal based on the scheduled series of switching events, and a switch for connecting one of supply voltages to the supply filter based on the level select signal. The level selection circuitry schedules a primary switching event of the switch based on the determined level of supply voltage and secondary switching events of the switch delayed with respect to the primary switching event based on the determined level of supply voltage to generate a filter response of the supply filter with smaller peaking.

A failure detection system for an energy network includes a radio frequency (RF) receiver adapted to be coupled with or in close proximity to the energy network, the RF receiver providing an amplitude modulated RF signal; an RF amplifier receiving the amplitude modulated RF signal and providing an amplified signal; an envelope detector receiving the amplitude modulated RF signal and providing a demodulated envelope signal; an optional algorithm implementation system receiving the demodulated envelope signal, where the optional algorithm implementation system processes the demodulated envelope signal by one or more of a Fast Fourier transform (FFT) trigger system and a phase-locked loop (PLL) trigger system; and a signature output that is the overall output signal of the failure detection system, wherein the signature output is adapted to indicate whether the energy network is experiencing partial discharge.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

The present disclosure relates to a dual-modulation power management circuit (PMC), which includes a first tracking amplifier coupled to a first voltage port and configured to contribute to a first modulated voltage at the first voltage port, a second tracking amplifier coupled to a second voltage port and configured to contribute to a second modulated voltage at the second voltage port, a charge pump, a power inductor, and a low-dropout (LDO) switch unit. Herein, the power inductor is configured to induce an output current, which is based on a boosted voltage generated by the charge pump, toward the first voltage port. A first portion of the output current is eligible to flow through the LDO switch unit from the first voltage port to the second voltage port. The first modulated voltage is not smaller than the second modulated voltage over time.