Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit is an output pre-match impedance conditioning shunt circuit, which includes a first shunt inductance, a second shunt inductance, and a shunt capacitor coupled in series. The first shunt inductance comprises a plurality of bondwires coupled between the first current carrying terminal and the second shunt inductance, and the second shunt inductance comprises an integrated inductor coupled between the first shunt inductance and a first terminal of the shunt capacitor. The shunt capacitor is configured to provide capacitive harmonic control of an output of the transistor.

Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.

Disclosed are a radio frequency power amplifier for inhibiting a harmonic wave and stray, a chip and a communication terminal. The radio frequency power amplifier comprises a power source, an LDO circuit, a harmonic inhibition unit, a stray inhibition unit, an amplifying unit, and a low-pass matching network. On the one hand, by means of the power source being connected to the harmonic inhibition unit, harmonic waves and stray of the power source at a resonant frequency are inhibited. Additionally, by means of the stray inhibition unit reducing the gain of the amplifying unit at a resonant frequency, output of stray is reduced. On the other hand, by means of the low-pass matching network being embedded at an output end of the radio frequency power amplifier, harmonic waves and the stray of a radio frequency signal amplified by the amplifying unit at different frequencies is effectively inhibited.

A radio frequency (RF) amplifier circuit includes a field effect transistor (FET) (e.g., a FET belonging to a III-V FET enhancement group), where the FET includes a gate terminal coupled to an RF input node. The circuit further includes a prematch and biasing network coupled between a bias voltage node and the RF input node. The prematch and biasing network includes a nonlinear gate current blocking device configured to block a current from flowing between the bias voltage node and the RF input node.

Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.

A transistor stack can include a combination of floating and body tied devices. Improved performance of the RF amplifier can be obtained by using a single body tied device as the input transistor of the stack, or as the output transistor of the stack, while other transistors of the stack are floating transistors. Transient response of the RF amplifier can be improved by using all body tied devices in the stack.

A control circuit with a bypass function includes a first signal terminal, a second signal terminal, an output terminal, a first switch unit to a fourth switch unit, an output switch unit and a bypass unit. The first signal terminal is used for receiving a first signal. The second signal terminal is used for receiving a second signal. The first switch unit is coupled to the first signal terminal. The second switch unit is coupled between the first switch unit and the output switch unit. The third switch unit is coupled to the second signal terminal. The fourth switch unit is coupled between the third switch unit and the output switch unit. The output switch unit is coupled between the second switch unit and the output terminal. The bypass unit is coupled between the first switch unit and the output terminal to provide a bypass path corresponding to the first signal.

A power amplification module includes a first transistor which amplifies and outputs a radio frequency signal input to its base; a current source which outputs a control current; a second transistor connected to an output of the current source, a first current from the control current input to its collector, a control voltage generation circuit connected to the output and which generates a control voltage according to a second current from the control current; a first FET, the drain being supplied with a supply voltage, the source being connected to the base of the first transistor, and the gate being supplied with the control voltage; and a second FET, the drain being supplied with the supply voltage, the source being connected to the base of the second transistor, and the gate being supplied with the control voltage.

A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.