Patent classifications
H03F2200/151
HIGH LINEARITY STRUCTURE FOR AMPLIFIER
An apparatus includes an input amplifier stage and a switch that has a first terminal at a virtual ground input of the input amplifier stage.
DUAL-OUTPUT AMPLIFIER CIRCUIT
A capacitive load, an inductive load, or a transmission line coupled to an output of a closed-loop amplifier circuit can cause undesirable oscillations in a feedback signal of the amplifier circuit. The oscillations in the feedback signal can cause the amplifier circuit to exhibit instability and unpredictable behavior. Techniques are described that allow an amplifier circuit to provide a stable response while driving a capacitive load.
AMPLIFIER CIRCUIT FOR MICROPHONE, MICROPHONE CIRCUIT AND ELECTRONIC DEVICE
An amplifier circuit for a microphone, a microphone circuit and an electronic device are provided. The amplifier circuit includes a first transistor having a gate serving as an input terminal of the amplifier circuit, a source serving as an output terminal of the amplifier circuit and a drain connected to ground, a first constant current source having an input terminal connected to a power supply and an output terminal connected to the source of the first transistor, and a source follower including at least a second transistor, having a drain connected to the power supply, a gate connected to the source of the first transistor and a source connected to the drain of the first transistor.
AMPLIFIER CIRCUIT AND CURRENT BUFFER THEREOF
A current buffer includes: a current replication circuit for generating a first intermediate current at a first node and a second intermediate current at a second node according to an input current; a first impedance biasing circuit for providing a first input impedance at the first node and generating an output current according to a current flowing through the first node; a second impedance biasing circuit for providing a second input impedance at the second node; and a feedforward capacitor coupled between the first node and the second node. The first input impedance is lower than the second input impedance, such that a current gain between the output current and the input current has a zero and a pole which are related to the feedforward capacitor and the second input impedance. The zero has a lower frequency than the pole.
RECEIVER CIRCUIT OF INTERFACE CIRCUIT AND OPERATING METHOD THEREOF
A receiver circuit includes: a first sampling circuit that includes a first capacitor connected to a first node, and is configured to receive a first input voltage, and store a charge corresponding to the first input voltage in the first capacitor during a first period; and a buffer circuit includes a first transistor including a gate terminal connected to the first node, a source terminal connected to a first output node which is configured to output a first output voltage corresponding to the first input voltage, and a drain terminal connected to a second node that is AC grounded during the first period.