H03F2200/159

METHOD FOR COMPENSATING FOR AN INTERNAL VOLTAGE OFFSET BETWEEN TWO INPUTS OF AN AMPLIFIER
20230283252 · 2023-09-07 · ·

An internal voltage offset between a positive input and a negative input of a first operational amplifier is compensated. The negative input and the positive input of the first operational amplifier are coupled at the same voltage level. A comparison current generated at an output of the first operational amplifier has a sign that is representative of a sign of the internal voltage offset. The output of the first operational amplifier is biased to a threshold voltage using a current-to-voltage converter. A control voltage is generated from a sum of the threshold voltage and a voltage conversion of the comparison current. Compensation for the internal voltage offset between the positive and negative inputs of the first operational amplifier is made dependent on the control voltage.

Radiofrequency integrated circuit and corresponding test method

A radiofrequency transmission/reception integrated circuit includes at least one radiofrequency signal amplifier (PA, LNA), the at least one amplifier being configured, in operational mode, so as to perform a function of amplifying a radiofrequency signal applied at input, wherein the amplifier is configured so as to perform an oscillator function in a self-test mode of the integrated circuit, to generate a radiofrequency signal on at least one of the input or the output of said amplifier. A self-test method for such an integrated circuit is also provided.

Amplifier Gain-Tuning Circuits and Methods

Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.

Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass
11152907 · 2021-10-19 · ·

An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

RADIOFREQUENCY INTEGRATED CIRCUIT AND CORRESPONDING TEST METHOD
20210116501 · 2021-04-22 ·

A radiofrequency transmission/reception integrated circuit includes at least one radiofrequency signal amplifier (PA, LNA), the at least one amplifier being configured, in operational mode, so as to perform a function of amplifying a radiofrequency signal applied at input, wherein the amplifier is configured so as to perform an oscillator function in a self-test mode of the integrated circuit, to generate a radiofrequency signal on at least one of the input or the output of said amplifier. A self-test method for such an integrated circuit is also provided.

Audible noise reduction in an audio power amplifier
11005427 · 2021-05-11 · ·

Aspects disclosed herein eliminate audible disturbances that may occur when an audio amplifier is activated and deactivated. A feedback circuit is used to maintain a closed loop when transistors of a power output stage are activate or deactivated, thereby enabling the charge to build or dissipate without causing an audible disturbance. Further, in certain implementations, the power output stage may remain in an enable state for a period of time after deactivation of the audio amplifier regardless of whether an audio input signal is received enabling dissipation of charge without causing an audible disturbance.

Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass
11870405 · 2024-01-09 · ·

An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

Optimized Multi Gain LNA Enabling Low Current and High Linearity Including Highly Linear Active Bypass
20200328724 · 2020-10-15 ·

An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

Amplifier systems for driving a wide range of loads

Amplifier systems for driving a wide range of loads are provided herein. In certain embodiments, an amplifier system includes a voltage output amplifier and a current output amplifier that are electrically coupled in parallel with one another between an input terminal and an output terminal. The amplifier system further includes a control circuit operable to control whether or not the voltage output amplifier and/or current output amplifier drive the output terminal.

I—V conversion module

An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.