Chopper amplifiers with high pass filters for suppressing chopping ripple are provided herein. In certain embodiments, a chopper amplifier includes an input chopping circuit, an amplification circuit, a low frequency content detection circuit, and an output chopping circuit electrically connected in a cascade. The low frequency content detection circuit operates in combination with a transconductance or other gain circuit as a high pass filter that filters input offset voltage and/or low frequency noise of the amplification circuit, thereby suppressing output chopping ripple from arising.

A multiple-stage amplifier includes a driver stage die and a final stage die. The driver stage die includes a first type of semiconductor substrate (e.g., a silicon substrate), a first transistor, and an integrated portion of an interstage impedance matching circuit. A control terminal of the first transistor is electrically coupled to an RF signal input terminal of the driver stage die, and the integrated portion of the interstage impedance matching circuit is electrically coupled between a current-carrying terminal of the first transistor and an RF signal output terminal of the driver stage die. The second die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a second transistor. A connection, which is a non-integrated portion of the interstage impedance matching circuit, is electrically coupled between the RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die.

Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.

A circuit structure including: a first amplifier stage having an input, and a second amplifier stage connected to the first amplifier stage. The second amplifier stage has an output. The first amplifier stage and the second amplifier stage carry a signal. A controller is configured to measure and modify at least one operational parameter of the signal. A first offset polarity detector-low pass filter (OPD-LPF) circuit connects the second amplifier stage output to the controller through a first controller input. A second OPD-LPF circuit connects the second amplifier stage to the controller through a second controller input. The controller measures an operational parameter of the signal for offset based on input from the first OPD-LPF circuit and the second OPD-LPF circuit. The controller modifies the operational parameter of the signal to correct signal offset.

A digital compensation system for a radio frequency (RF) power amplifier module is disclosed. The digital compensation system includes an RF power amplifier having a first input, a first output, and a first bias input, wherein the RF power amplifier is configured to receive an RF signal at the first input and generate an amplified version of the RF signal at the first output. The digital compensation system also includes compensation circuitry coupled between the first input and the first output and a bias output coupled to the RF power amplifier, wherein the compensation circuitry is configured, in response to the RF signal, to generate or adjust a bias signal at the first bias input to correct dynamic bias errors caused by amplification variations that have time constants.

Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes an input, an output, a transconductance device, a cascode device, and a mid-node impedance network. The transconductance device generates an amplified signal by amplifying an input signal received at the input, and provides the amplified signal to the output via the cascode device. The mid-node impedance network is electrically connected between the transconductance device and the cascode device, and provides compensation for a parasitic capacitance of the gm device, thereby enhancing the LNA's performance.

Multi-level envelope tracking systems are disclosed. In certain embodiments, a method of envelope tracking includes amplifying a radio frequency signal using a power amplifier, supplying power to the power amplifier using a power amplifier supply voltage, generating a plurality of delay-controlled regulated voltages based on controlling a delay of a plurality of regulated voltages using a controllable delay circuit, generating a modulator output voltage at a modulator output of a modulator, providing filtering using a first filter coupled between the modulator output and the power amplifier supply voltage, and controlling activation of a plurality of switches of the modulator based on an envelope of the radio frequency signal. The plurality of switches are each coupled between the modulator output and a corresponding one of the plurality of delay-controlled regulated voltages.

A current mirror device includes an input end for receiving an input signal, an output end for outputting an amplified signal of the input signal, first through third transistors, and an operational amplifier. The first transistor includes a first end coupled to first reference current and a second end coupled to a bias voltage. The control end of the second transistor is coupled to the input end. The third transistor includes a first end coupled to the output end, a second end coupled to the first end of the second transistor and a control end coupled to a reference voltage. The operational amplifier is configured to keep a first voltage and a second voltage at substantially the same level, wherein the first voltage is obtained on the first end of the first transistor and the second voltage is obtained on the first end of the second transistor. Therefore, the reference current flowing through the first transistor can be accurately amplified to a desired value and mirrored to become load current flowing through the second transistor.

A circuit includes a first transistor comprising a gate, a source, and a drain, and an inductor coupled between the gate and the source of the first transistor, wherein the source is further coupled to a current source and the gate is further coupled to an amplifier.

A PA module (10A) includes a previous stage amplification element (12) to amplify a high-frequency signal, a posterior stage amplification element (13) to amplify the high-frequency signal amplified by the previous stage amplification element (12), and a variable filter circuit arranged between the previous stage amplification element (12) and the posterior stage amplification element (13) to vary a pass band and an attenuation band in accordance with a frequency band of the high-frequency signal, in which the variable filter circuit includes a filter portion (16) and switches (14 and 15) to vary the pass band and the attenuation band of the variable filter circuit, and the previous stage amplification element (12) and at least a part of the switches (14 and 15) are formed in one chip using a chip A, the posterior stage amplification element (13) are included in a second chip which is different from the chip A.