H03F2200/171

BTL OUTPUT SELF-OSCILLATING CLASS D AMPLIFIER
20170279422 · 2017-09-28 ·

A Bridge-Tied Load output self-oscillating class D amplifier includes a comparator receives an input signal from a signal input circuit at a second input terminal and outputs a positive-phase pulse width modulation signal and a reverse-phase pulse width modulation signal by comparing voltages of the two input terminal, first and second switching circuits power-amplifies the reverse-phase pulse width modulation signal and the positive-phase pulse width modulation signal, a first low-pass filter extracts a first output signal from the reverse-phase pulse width modulation signal, a second low-pass filter extracts a second output signal from the positive-phase pulse width modulation signal, a subtractor calculates a difference between the first and second output signals and output a difference signal, and a first feedback circuit feeds back the difference signal to the second input terminal of the comparator.

INTEGRATED FILTER AND DIRECTIONAL COUPLER ASSEMBLIES

Integrated filter and electromagnetic coupler assemblies. In certain examples, an integrated filter and electromagnetic coupler assembly includes a filter having a capacitance and a series inductance, the series inductance being connected between an input port and an output port of the integrated filter and electromagnetic coupler assembly, and combination of the capacitance and the series inductance being selected to provide the filter with a passband and a stopband. The integrated filter and electromagnetic coupler assembly further includes a coupling element positioned physically proximate the series inductance and extending between a coupled port and an isolation port of the integrated filter and electromagnetic coupler assembly, the integrated filter and electromagnetic coupler assembly being configured to provide at the coupled port a coupled signal via inductive coupling between the series inductance and the coupling element responsive to receiving an input signal at the input port.

Class D amplifier
11245368 · 2022-02-08 · ·

A class D amplifier includes a self-oscillating class D amplification circuit that is driven by an output current signal; and a voltage-current converting circuit that outputs an output current signal in response to an input signal voltage and an output signal voltage from a feedback signal voltage.

Integrated circuit and related audio amplifier

An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.

Phase correction in a Doherty power amplifier
09748902 · 2017-08-29 · ·

In various embodiments, a semiconductor package includes a carrier amplifier connected to a first output of a power divider, and a first output matching network connected to the carrier amplifier and an output combining node. The first output matching network exhibits a phase delay during operation of the carrier amplifier. The semiconductor package includes a phase advance network connected to the first output matching network. The phase advance network is configured to offset at least a portion of the phase delay of the first output matching network. The semiconductor package includes a peaking amplifier connected to a second output of the power divider and the output combining node, and a second output matching network connected to the peaking amplifier.

Power-adjustable radio frequency output circuit

A power-adjustable RF (radio frequency) output circuit is disclosed, which includes a RF frequency source transformer, wherein: one output end of the RF frequency source transformer is connected with a gate of a power amplifier module, another output end of the RF frequency source transformer is connected with a gate bias voltage control circuit; a source of the power amplifier module is connected with ground; the gate of the power amplifier module is connected with a resistor which is connected with ground, a drain of the power amplifier module is connected with a fixed voltage DC (direct current) power supply and also connected with a RF filtering network for outputting a RF power through the RF filtering network.

MODULATED SIGNAL GENERATING DEVICE AND WIRELESS DEVICE

A modulated signal generating device for modulating includes a first amplifier that generates a first amplified signal based on a first control signal; a second amplifier that has a smaller amplification factor as compared to the first amplifier and that generates a second amplified signal based on a second control signal; a combiner that combines the first amplified signal and the second amplified signal and generates a modulated signal; a first control unit that generates the first control signal based on a first component signal included in a input signal; a first filter that eliminates the harmonic component included in a first difference signal, which represents the difference between the input signal and the first component signal, and generates a first filtered signal; and a second control unit that generates the second control signal based on a second component signal included in the first filtered signal.

Direct current (DC)-DC converter having a multi-stage output filter

A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

SELF-OSCILLATING CLASS D AMPLIFIER
20170279421 · 2017-09-28 ·

A self-oscillating class D amplifier includes an integration circuit configured to integrate an input signal and output a result of the integration as an integrated signal, a comparator configured to receive the integrated signal at an inverting input terminal and output a pulse width modulation signal by comparing voltages of a non-inverting input terminal being grounded and the inverting input terminal, a switching circuit configured to power-amplify the pulse width modulation signal output from the comparator, a low-pass filter configured to extract an amplified output signal from the power-amplified pulse width modulation signal, a first feedback circuit configured to feed back the output signal of the low-pass filter to the inverting input terminal of the comparator, and a second feedback circuit configured to feed back the output signal of the low-pass filter to the integration circuit.

Method and system for a pseudo-differential low-noise amplifier at Ku-band
09819319 · 2017-11-14 · ·

Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor.