A method can be used to measure a load driven by a switching amplifier having a differential input, an LC output demodulator filter and a feedback network between the amplifier output and the differential input. The amplifier is AC driven in a differential and in a common mode by applying a common. The feedback network provides feedback towards the differential input from downstream the LC demodulator filter by computing the impedance of the load as a function of the differential mode output current and the common mode output current. The feedback network provides feedback towards the differential input from upstream the LC demodulator filter by measuring the impedance value of the inductor of the LC demodulator filter, and computing the impedance of the load as a function of the differential mode output current, the common mode output current and the impedance value of the inductor of the LC demodulator filter.

A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.

An amplifier circuit includes an amplifier configured to receive a radio frequency (RF) input signal from an input node, a bias circuit comprising a reference transistor coupled between a reference current source and ground, and a bias transistor coupled to the reference transistor and configured to generate a main bias current to bias the amplifier, an input power sense circuit coupled to the input node, and an additional transistor coupled to the input power sense circuit and to the bias transistor, the additional transistor configured to generate an additional bias current to bias the amplifier, the additional bias current responsive to a power level of the RF input signal.

A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, a matching circuit disposed between an output terminal of the amplifier and a subsequent circuit, a choke inductor having a first end to which a power supply voltage is applied and a second end from which power supply is provided to the amplifier through the output terminal of the amplifier, and a first attenuation circuit disposed between the output terminal of the amplifier and the second end of the choke inductor and configured to attenuate a harmonic component of the amplified signal.

An electronic device includes a waveform generator, a comparator, and an amplifier. The waveform generator receives a voltage from a power supply to the electronic device and outputs a voltage waveform signal. The comparator compares an input signal and the voltage waveform signal to output a first pulse-width-modulated signal. The amplifier receives the first pulse-width-modulated signal and outputs a second pulse-width-modulated signal.

A circuit having a power amplifier port, an antenna port, and a ladder network coupled between the power amplifier and antenna ports is disclosed. The ladder network includes a proximal series acoustic resonator coupled to the power amplifier port, a distal series acoustic resonator coupled to the antenna port, and at least one series acoustic resonator coupled between the proximal series acoustic resonator and the distal series acoustic resonator. A first shunt acoustic resonator is coupled between a fixed voltage node and the proximal series acoustic resonator and the at least one series acoustic resonator. A second shunt acoustic resonator is coupled between the fixed voltage node and a second node to which the at least one series acoustic resonator is also coupled. A first inductor is coupled in parallel with the proximal series acoustic resonator to create notches below and above a passband of the ladder network.

A DC offset cancellation circuit and a DC offset cancellation method are disclosed. The DC offset cancellation circuit comprises a high-speed amplifier, a voltage comparator, a microprocessor, and a digital-to-analog converter. The high-speed amplifier comprises an input stage with a DC offset cancellation function, an amplification stage, and an output buffer stage. The voltage comparator is connected to the output buffer stage. The microprocessor is connected to the voltage comparator. The digital-to-analog converter is connected to the microprocessor. The digital-to-analog converter is connected to the input stage.

A RF amplifier is provided that includes a plurality of switch modules connected in a cascade configuration and divided into disjoint sets in accordance with their corresponding distinct peak DC voltages or currents, each switch module including a plurality of switch devices connected in a half-bridge or full-bridge circuit and a DC voltage or current source electrically connected with the half-bridge or full-bridge circuit, and a control circuit configured to determine an output voltage or current of the RF amplifier at the next switching interval, examine the states of the switching devices in the respective switch modules to identify a combination of least-recently-switched switching devices within each set of switch modules that, when switched to an opposite state, will produce the determined output voltage or current, and switch to an opposite state, at the next switching interval, the switching devices in the identified combination.

A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.

This invention enables to efficiently improve the signal-to-noise power ratio of a delta-sigma modulator without increasing the operating frequency. A digital modulation device 40 includes: a setting unit 41 that sets mutually different default values for N delta-sigma modulation units 42-1 to 42-N; N delta-sigma modulation units 42-1 to 42-N that input signals for each clock cycle indicated in a first clock signal and then perform delta-sigma modulation on the input signals to output modulated signals including noise signals having values that change in accordance with default values; and a serial output unit 43 that inputs, in order, the modulated signals output by the delta-sigma modulation units 42-1 to 42-N for each clock cycle indicated in a second clock signal, the second clock signal having a clock cycle that is 1/N of the clock cycle of the first clock signal, and then serializes and outputs the modulated signals.