H03F2200/18

Power-adjustable radio frequency output circuit

A power-adjustable RF (radio frequency) output circuit is disclosed, which includes a RF frequency source transformer, wherein: one output end of the RF frequency source transformer is connected with a gate of a power amplifier module, another output end of the RF frequency source transformer is connected with a gate bias voltage control circuit; a source of the power amplifier module is connected with ground; the gate of the power amplifier module is connected with a resistor which is connected with ground, a drain of the power amplifier module is connected with a fixed voltage DC (direct current) power supply and also connected with a RF filtering network for outputting a RF power through the RF filtering network.

HIGH LINEARITY INDUCTORLESS LNA
20170244367 · 2017-08-24 ·

An inductor-less low noise amplifier (LNA) with high linearity is disclosed. The low noise amplifier includes: an input signal stage receiving an input signal; a first amplifier configured to receive the input signal, generate a first amplification signal by amplifying the received input signal, and output the generated first amplification signal, as a first output signal, to a first output terminal; a second amplifier configured to receive the input signal, generate a second amplification signal by amplifying the received input signal, and output the generated second amplification signal, as a second output signal, to a second output terminal; an output signal stage outputting a superimposition signal obtained by superimposing the first output signal and the second output signal; a first resistor feeding back the superimposition signal to the input signal stage; and a switch connecting/disconnecting between the input signal stage and the output signal stage.

Amplifier for cutting leakage current and electronic device including the amplifier

An electronic device including an amplifier which includes a first transistor configured to receive an input signal through a gate terminal thereof and having a source terminal electrically connected to ground, a second transistor configured to transmit an output signal through a drain terminal thereof and having a gate terminal electrically connected to the ground, and a switch electrically connected to the gate terminal of the second transistor and configured to switch a voltage being supplied to the gate terminal of the second transistor in accordance with turn-on or turn-off of the amplifier.

Amplifier circuitry and method of amplification

An amplifier includes a first circuitry, a second circuitry, and a plurality of amplifier circuitries. The first circuitry controls an enable signal. The second circuitry controls a bias signal. Circuitries which output signals are decided from among the plurality of circuitries based on the enable signal, and each of the circuitries which output the signals amplifies an input signal with a gain corresponding to the bias signal.

PULSE-SHAPING AMPLIFIER SYSTEM
20170237461 · 2017-08-17 ·

One example includes an amplifier system. The amplifier system includes an input stage configured to receive an input pulse signal and to generate a reference voltage pulse based on the input pulse signal. The amplifier system also includes an amplifier stage that receives at least one power voltage and is configured to amplify the reference voltage pulse and to provide pulse-shaping of the amplified reference voltage pulse based on a change of amplitude of the at least one power voltage resulting from an amplitude of the reference voltage pulse.

Multiplexed Multi-stage Low Noise Amplifier Uses Gallium Arsenide and CMOS Dice
20170237403 · 2017-08-17 ·

A gate bias circuit for a plurality of GaAs amplifier stages is a transistor coupled to a temperature compensation current received from a CMOS control stage. A plurality of pHEMPT amplifier stages are coupled to the gate bias circuit and to a control voltage which switches the amplifier stage. A selectively controlled stage pass transistor enables a current mirror between the gate bias circuit and each stage amplifying transistor. The penultimate pHEMPT amplifier stage is coupled to a CMOS amplifier. A CMOS circuit provides both the temperature compensation current by a proportional to absolute temperature (PTAT) circuit and the control voltage enabling each pHEMPT transistor to receive its input signal in combination with the gate bias voltage.

Bias circuit and amplifying device with temperature compensation

A bias circuit includes a current generating circuit generating an internal base current based on a reference current, a bias output circuit generating a base bias current based on the internal base current and outputting the base bias current to an amplifying circuit, and a temperature compensation circuit regulating the base bias current based on a temperature voltage reflecting a change in ambient temperature.

Power amplifier and method for limiting current in power amplifier

A power amplifier apparatus includes: an amplifier configured to amplify an input signal; a sensing circuit connected to the amplifier and configured to sense a bias of the amplifier; and a biasing circuit connected to the sensing circuit and configured to provide a biasing current to the amplifier, wherein the sensing circuit is configured to change the biasing current based on the bias of the amplifier.

Amplifying circuit and amplifying device with start-up function

An amplifying circuit is provided. The amplifying circuit includes a bias circuit receiving an operating voltage from a power supply circuit and generating a first bias voltage, a resistance circuit connected between the bias circuit and a gate node and transferring the first bias voltage to the gate node, a start-up circuit generating a high-level start-up voltage and supplying the start-up voltage to the gate node before the operating voltage is supplied, based on a control signal, and an amplifier started-up by receiving the start-up voltage and then receiving the operating voltage and the first bias voltage to amplify a high frequency signal input through the gate node.

WIDEBAND ADAPTIVE BIAS CIRCUITS FOR POWER AMPLIFIERS

Methods and apparatus for providing adaptive biasing to power amplifiers. Adaptive bias circuits are configured to provide sharp turn on and/or current clamping to improve the efficiency of a power amplifier over a wide input signal bandwidth. Sharp turn on may be achieved using a subtraction technique to subtract outputs from multiple detectors. Clamping may be achieved using MOSFET device characteristics to pull the device from the triode region into the saturation, subtraction techniques to subtract the outputs from multiple detectors, and/or by using circuit devices, such as diodes.