Patent classifications
H03F2200/181
COMMUNICATIONS DEVICE WITH RECEIVER CHAIN OF REDUCED SIZE
A communications device includes a transmission chain coupled to an antenna a receiver chain coupled to the antenna. The receiver chain includes an amplifier device having an input coupled to the antenna. A controlled switching circuit is included in the amplifier device and is operable to selectively disconnect conduction terminals of an amplifying transistor from power supply terminals when the transmission chain is operating to pass a transmit signal to the antenna.
RF amplifier with conductor-less region underlying filter circuit inductor, and methods of manufacture thereof
An amplifier includes a semiconductor substrate. A first conductive feature partially covers the bottom substrate surface to define a conductor-less region of the bottom substrate surface. A first current conducting terminal of a transistor is electrically coupled to the first conductive feature. Second and third conductive features may be coupled to other regions of the bottom substrate surface. A first filter circuit includes an inductor formed over a portion of the top substrate surface that is directly opposite the conductor-less region. The first filter circuit may be electrically coupled between a second current conducting terminal of the transistor and the second conductive feature. A second filter circuit may be electrically coupled between a control terminal of the transistor and the third conductive feature. Conductive leads may be coupled to the second and third conductive features, or the second and third conductive features may be coupled to a printed circuit board.
MATRIX POWER AMPLIFIER
A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.
FULLY INTEGRATED LOW-NOISE AMPLIFIER
A low-noise amplifier device includes an inductive input element, an amplifier circuit, an inductive output element and an inductive degeneration element. The amplifier device is formed in and on a semiconductor substrate. The semiconductor substrate supports metallization levels of a back end of line structure. The metal lines of the inductive input element, inductive output element and inductive degeneration element are formed within one or more of the metallization levels. The inductive input element has a spiral shape and the an amplifier circuit, an inductive output element and an inductive degeneration element are located within the spiral shape.
Current-mode power amplifier
A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.
RF power transistors with video bandwidth circuits, and methods of manufacture thereof
Embodiments of RF amplifiers and packaged RF amplifier devices each include a transistor, an impedance matching circuit, and a video bandwidth circuit. The impedance matching circuit is coupled between the transistor and an RF I/O (e.g., an input or output lead). The video bandwidth circuit is coupled between a connection node of the impedance matching circuit and a ground reference node. The video bandwidth circuit includes a plurality of components, which includes an envelope inductor and an envelope capacitor coupled in series between the connection node and the ground reference node. The video bandwidth circuit further includes a first bypass capacitor coupled in parallel across one or more of the plurality of components of the video bandwidth circuit.
CURRENT-MODE POWER AMPLIFIER
A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.
RF POWER TRANSISTORS WITH VIDEO BANDWIDTH CIRCUITS, AND METHODS OF MANUFACTURE THEREOF
Embodiments of RF amplifiers and packaged RF amplifier devices each include a transistor, an impedance matching circuit, and a video bandwidth circuit. The impedance matching circuit is coupled between the transistor and an RF I/O (e.g., an input or output lead). The video bandwidth circuit is coupled between a connection node of the impedance matching circuit and a ground reference node. The video bandwidth circuit includes a plurality of components, which includes an envelope inductor and an envelope capacitor coupled in series between the connection node and the ground reference node. The video bandwidth circuit further includes a first bypass capacitor coupled in parallel across one or more of the plurality of components of the video bandwidth circuit.
LOW-NOISE AMPLIFIER (LNA) INPUT IMPEDANCE IMPROVEMENT USING COUPLING BETWEEN OUTPUT INDUCTOR AND DEGENERATION INDUCTOR
A low-noise amplifier (LNA) includes a first transistor, a first source inductor coupled to a source of the first transistor, and a second transistor, wherein a source of the second transistor is coupled to a drain of the first transistor, a gate of the second transistor is coupled to a bias circuit, and a drain of the second transistor is coupled to an output of the LNA. The LNA also includes an output inductor coupled between a supply rail and the output of the LNA, wherein the output inductor is magnetically coupled with the first source inductor.
DC bias regulator for cascode amplifier
An amplifier having a pair of transistors arranged in a cascode amplifier arrangement serially connected to a first voltage source. A DC bias regulator is provided having: a DC bias circuit for producing a reference voltage at a control electrode of a first one of the pair of transistors: and a voltage combiner having a pair of inputs, a first of the pair of inputs being coupled to the reference voltage and a second one of the pair of inputs being coupled to the first voltage source. The DC bias regulator produces a DC bias voltage at a control electrode of a second one of the pair of transistors related to a combination of the reference voltage and the first voltage source.