H03F2200/189

POWER AMPLIFIER SYSTEMS WITH DIFFERENTIAL GROUND
20180076770 · 2018-03-15 ·

Apparatus and methods for power amplifier systems with differential ground are provided. In certain implementations, a semiconductor die for a radio frequency communication system includes a differential ground network configured to distribute a ground voltage. The differential ground network is substantially symmetric with respect to a line of symmetry. The semiconductor die further includes a first differential power amplifier including a first half circuit and a second half circuit that operate differentially to provide amplification. The first half circuit and the second half circuit are symmetrically connected to the differential ground network. The semiconductor die can further include a second differential power amplifier, and the differential ground network serves to provide isolation between the first differential power amplifier and the second differential power amplifier.

Driver integrated circuit

Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).

Headset amplification circuit with error voltage suppression

A headset driver circuit is described which comprises a connector interface. The connector interface comprises a first terminal, a second terminal and a third terminal for establishing respective electrical connections to a first speaker, a microphone and a common ground node of a headphone, earphone or headset, respectively. A first power amplifier is coupled to the first terminal to supply a first audio output signal to the first speaker of the headset. A first switch arrangement comprises a first ground switch is configured for selectively connecting and disconnecting the second terminal and a ground node of the headset driver circuit. The headset driver circuit further comprises a second ground switch configured for selectively connecting and disconnecting the third terminal and the ground node. The headset driver circuit also comprises a differential preamplifier, e.g. a microphone preamplifier, configured to generate a microphone output voltage where the differential preamplifier comprises a first signal input coupled to the second terminal and a second signal input coupled to the third terminal of the connector interface. An error suppression circuit is configured to sense or sample a noise or error voltage at the second terminal when ground connected or the third terminal when ground connected. The error suppression circuit is further configured to add the sensed or sampled noise or error voltage to a predetermined DC bias voltage and generate an error compensated DC bias voltage for the ungrounded one of the second and third terminals of the connector interface.

Communication over a voltage isolation barrier

A transmitter circuit comprises: an input, an encoder circuit, and a transmitter. During operation, the transmitter circuit receives an input signal. The encoder circuit encodes the received input signal into an encoded signal. The encoder circuit produces the encoded signal: i) to indicate changing states of the input signal, and ii) to include a supplemental transient signal with respect to the received input signal. The transmitter transmits the encoded signal from an output of the first circuit over a link to a second circuit such as a receiver circuit. A receiver decodes the encoded signal to reproduce a rendition of the input signal to control remote power supply circuitry. Presence of the supplemental transient signal in the encoded signal indicates to the receiver circuit that the first circuit actively transmits the output signal even though there may not be any change to a current state of the input signal.

METHODS AND CIRCUITRY TO TRIM COMMON MODE TRANSIENT CONTROL CIRCUITRY
20170133986 · 2017-05-11 ·

Embodiments herein include a replica communication path and monitor circuit to provide increased common mode transient immunity. As its name suggests, the monitor circuit monitors the replica communication path and produces an adjustment signal (common mode transient adjustment signal) to cancel presence of a common mode transient signal in one or more other communication paths conveying data signals.

Methods and circuitry to trim common mode transient control circuitry

Embodiments herein include a replica communication path and monitor circuit to provide increased common mode transient immunity. As its name suggests, the monitor circuit monitors the replica communication path and produces an adjustment signal (common mode transient adjustment signal) to cancel presence of a common mode transient signal in one or more other communication paths conveying data signals.

Methods and circuitry to provide common mode transient immunity

Embodiments herein include a replica communication path and monitor circuit to provide increased common mode transient immunity. As its name suggests, the monitor circuit monitors the replica communication path and produces an adjustment signal (common mode transient adjustment signal) to cancel presence of a common mode transient signal in one or more other communication paths conveying data signals.

Receiver circuit

A receiver circuit comprising: an input-pin; a receiver-input-node; a ground-pin; an internal-node that is connected to the input-pin; and a MOSFET. The MOSFET has a conduction channel connected in series between the internal-node and the receiver-input-terminal; and a gate terminal, the voltage at which sets the conductivity of the conduction channel. The receiver circuit also includes an amplifier that: has an input terminal that is connected to the internal-node; and provides a voltage control signal to the gate terminal of the MOSFET such that the voltage at the internal-node with respect to the ground-pin is constant.