An amplifier circuit for compensating an output signal provided at an output of the amplifier circuit comprises a cascade of sub-amplifiers. Each sub-amplifier of the cascade contributes to a respective part of the output signal. The cascade of sub-amplifiers comprises an end sub-amplifier and at least one preliminary sub-amplifier. At least one error correction block is coupled to apply feedforward error correction to an output of one of the at least one preliminary sub-amplifier.

Examples of an amplifier includes an input divider section having a first path and a second path for branching of an input signal, wherein a passing phase at the first path and a passing phase at the second path are different; a first amplifying element that amplifies a signal input to the first path; a second amplifying element that amplifies a signal input to the second path; an output synthesizing section that performs synthesis of an output of the first amplifying element and an output of the second amplifying element with a third path for transmitting the output of the first amplifying element and a fourth path for transmitting the output of the second amplifying element, wherein a passing phase at the third path and a passing phase at the fourth path are different; and an electromagnetic coupling section that establishes electromagnetic coupling of two signals.

A directional coupler includes a main line through which a first signal in a first frequency band and a second signal in a second frequency band pass from a first port to a second port, a sub-line electromagnetically coupled to the main line and having a third port and a fourth port, the third port outputting a first coupled signal corresponding to the first signal and a second coupled signal corresponding to the second signal, a first termination circuit connected to the fourth port and used in outputting the first coupled signal, a second termination circuit connected to the fourth port and used in outputting the second coupled signal, and a first filter circuit disposed between the fourth port and the first termination circuit, wherein the first filter circuit has frequency characteristics allowing the first coupled signal to pass therethrough and attenuating the second coupled signal.

According to one aspect, embodiments of the invention provide an amplifier system comprising a first phase shifter configured to generate, based on an input signal, a first signal and a second signal, the second signal being out of phase with the first signal, a first amplifier configured to apply a first gain to the first signal to produce a gain adjusted first signal, a second amplifier configured to apply a second gain to the second signal to produce a gain adjusted second signal, a second phase shifter configured to combine the gain adjusted first and second signals to produce an output signal, and a controller configured to identify a high voltage swing across the first amplifier and, in response to identifying the high voltage swing, adjust the first gain to reduce output power of the first amplifier and adjust the second gain to increase output power of the second amplifier.

Embodiments are described herein for power generation systems and methods that use quadrature splitters and combiners to facilitate plasma stability and control. For one embodiment, a quadrature splitter receives an input signal and generates a first and second signals as outputs with the second signal being ninety degrees out of phase with respect to the first signal. Two amplifiers then generate a first and second amplified signals. A quadrature combiner receives the first and second amplified signals and generates a combined amplified signal that represents re-aligned versions of the first and second amplified signals. The power amplifiers can be combined into a system to generate a high power output to a processing chamber. Further, detectors can generate measurements used to monitor and control power generation. The power amplifiers, system, and methods provide significant advantages for high-power generation delivered to process chambers for plasma generation during plasma processing.

A power amplifier having: a plurality of N amplifier modules, where N is an integer greater than one; an M:N power splitter having M inputs, where M is an integer less than N, and N outputs, each one of the N outputs being coupled to an input of a corresponding one of the plurality of N power amplifiers; a plurality of M delay lines, each one the M delay lines having an output coupled to a corresponding one of the M inputs of the M:N power splitter, each one of the plurality of M delay lines being coupled to a common input of the power amplifier.

A balanced-to-Doherty (B2D) mode-reconfigurable power amplifier (PA) has the capability of maintaining high linearity and high efficiency against load mismatch. The reconfigurable PA includes a switch to alternatively connect to a pre-determined resistive load or a pre-determined pure reactive load (jX), i.e., short, open, or finite reactance between an output quadrature coupler and ground. The biasing of Doherty mode is adaptive dependent on the value of reactive loading (jX). The Doherty operation of this PA is based on an architecture configured from a balanced amplifier, e.g., a quasi-balanced amplifier.

A hybrid coupler-based T/R switch for use in a TDM system. An output hybrid coupler of a balanced amplifier is used to selectively switch a transmit or receive path to an antenna. During transmission, power at the output of the balanced amplifier is delivered directly to the antenna. During reception, power from the antenna is reflected through ports of the hybrid coupler connected to respective two amplifiers of the balanced amplifier, to constructively combine at a port of the coupler coupled to the receive path, with a ninety degrees phase shift. A pair of shunting switches coupled to the ports of the hybrid coupler connected to the two amplifiers, and a shunting switch coupled to the port coupled to the receive path, control operation of the hybrid coupler-based T/R switch.

To provide a high-voltage output amplifier having a wide bandwidth which can efficiently reduce power consumption and allows employment of relatively low withstand voltage Nch MOS FETs without imbalanced voltage distribution between a Nch MOS FET Q101 and a Nch MOS FET Q102 and imbalanced distribution between a Nch MOS FET Q201 and a Nch MOS FET Q202. A high-voltage amplifier of a positive-side output stage circuit comprises a Nch MOS FET Q101 and a Nch MOS FET Q102, while a high-voltage amplifier of a negative-side output stage circuit comprises a Nch MOS FET Q201 and a Nch MOS FET Q 202. The source of the Nch MOS FET Q101 is connected to the drain of the Nch MOS FET Q102, the source of the Nch MOS FET Q201 is connected to the drain of the Nch MOS FET Q202. Current controls at the source of the Nch MOS FET Q102 and the source of the Nch MOS FET Q202 are conducted respectively. The current control at the source of the Nch MOS FET Q202 is conducted by a negative-side photo coupler. The gate of the Nch MOS FET Q101 and the gate of the Nch MOS FET Q201 are connected via a condenser C151.

Embodiments of this application disclose a signal processing circuit, a radio frequency signal transmitter, and a communications device, and relate to the field of electronic device technologies, to improve power amplification efficiency of the signal processing circuit. The signal processing circuit includes: a splitter, a radio frequency signal converter, a first branch power amplifier, a second branch power amplifier, and a combiner. The splitter is connected to the radio frequency signal converter, the radio frequency signal converter is connected to the first branch power amplifier and the second branch power amplifier, and the first branch power amplifier and the second branch power amplifier are connected to the combiner.