An amplifier device includes an alternate current (AC) coupling circuit, an amplifier circuit, and a first bias circuit. The amplifier circuit is configured to amplify an input signal to generate an output signal, in which the amplifier circuit includes a first input terminal, and the first input terminal receives the input signal via the AC coupling circuit. The first bias circuit is configured to apply a first bias voltage to the first input terminal according to one of the output signal and a first voltage, such that the amplifier circuit amplifies the input signal to output the output signal.

Methods and devices to fabricate low-cost wideband LNAs that are tunable to multiple frequency bands. Decoupling capacitors are used as part of a tuning circuit implemented at the LNA input. The capacitors are switchably selectable to also tune a signal into desired frequency bands.

Disclosed is a bias circuit for a radio frequency power amplifier, including a resistor voltage divider network, a power amplifier coupled with the resistor voltage divider network and a bias voltage adjusting loop coupled to the resistor voltage divider network and including one voltage divider resistor and one transistor pair; one terminal of the voltage divider resistor is connected with a reference voltage, and an other terminal is coupled with a gate of the first metal oxide semiconductor transistor; the transistor pair includes a first metal oxide semiconductor transistor and a second metal oxide semiconductor transistor, where a gate of the second metal oxide semiconductor transistor is coupled to the gate of the first metal oxide semiconductor transistor.

Apparatus and methods for compensating supply sensitive circuits for supply voltage variation are provided. An electronic system includes a power supply that outputs a supply voltage having a nominal voltage level, a supply conductor for routing the supply voltage, and a group of integrated circuits (ICs) that each receive the supply voltage from the supply conductor. Each IC includes a supply sensing circuit that generates a sense signal based on a local voltage level of the supply voltage at the IC, a bias control circuit that adjusts a bias signal based on the sense signal to account for a difference between the nominal voltage level and the local voltage level of the supply voltage, and a signal processing circuit biased by the bias signal.

A power amplifier including: a main power amplification device having an output; an auxiliary power amplification device having an output; a load modulation circuit operably connected to the output of the main power amplification device and the output of the auxiliary power amplification device; and a post-matching circuit operably connected to load modulation circuit. The load modulation circuit is arranged to enable fundamental frequency load modulation and to enable modulated harmonic terminations of at least the second and third harmonic frequencies. The modulated harmonic terminations may include drain terminations.

Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Example embodiments relate to push-pull class E amplifiers. One example push-pull class E amplifier includes an input configured for receiving a signal to be amplified. The push-pull class E amplifier also includes an output configured for outputting the signal after amplification. Additionally, the push-pull class E amplifier includes a printed circuit board having a first dielectric layer and a second dielectric layer. Further, the push-pull class E amplifier includes a first amplifying unit and a second amplifying unit. Yet further, the push-pull class E amplifier includes a balun, a capacitive unit, a first line segment, a second line segment, a third line segment, and a fourth line segment. The first line segment and the second line segment are arranged on the first dielectric layer. A combined length of the third line segment and the fourth line segment corresponds to a quarter wavelength of an operational frequency of the amplifier.

A reconfigurable amplifier configured to decrease radio frequency (RF) signal distortion and increase dynamic range is disclosed. The reconfigurable amplifier includes an amplifier having an RF signal input, an RF signal output, and a bias signal input. A distortion detection network has a detector input coupled to the RF signal output and a detector output, wherein the distortion detector network is configured to generate a detection signal that is proportional to distortion at the RF signal output. A bias controller has a detection signal input coupled to the detector output and a bias output coupled to the bias signal input. The bias controller is configured to generate a bias signal that dynamically shifts level at the bias output to reduce the distortion at the RF signal output in response to the detection signal.

A bias circuit includes a linear core circuit CC with first and second mutually type corresponding transistors (M1; M2) and a current mirror CM with third and fourth transistors (M3; M4) of opposite type of M1 and M2. To obtain an equilibrium with a constant transconductance of the first transistor, first and second negative feedback loops (L1; L2) are applied, one including the linear core circuit CC, the other including the current mirror CM. In a first setting one loop suppresses differences between first and second drain voltages (Vd1; Vd2) and the other loop suppresses differences between one of of the first and second drain voltage Vd1 and Vd2 and a reference voltage Vref. In the second setting, one loop suppresses differences between the first drain voltage Vd1 and the reference voltage Vref and the other loop differences between the second drain voltage Vd2 and the reference voltage Vref.