A power amplifier module including an input configured to receive an input radio frequency signal, the input radio-frequency signal including a series of data symbols, an output configured to provide an output radio-frequency signal, a power amplifier having a signal input to receive the input radio-frequency signal and a power supply input to receive a supply voltage, the power amplifier configured to amplify the input radio-frequency signal to provide the output radio-frequency signal, and a controller to receive an indication of a peak output power level of an upcoming data symbol in the series of data symbols, to adjust at least the supply voltage provided to the power amplifier based on the peak output power level of the upcoming data symbol, and to configure the power amplifier module to maintain a substantially constant gain over the series of data symbols.

A series-type Doherty amplifier circuit includes a first amplifier, a second amplifier, and a directional coupler. The first amplifier is of a first type and has an input for receiving a radio frequency input signal, and an output. The second amplifier is of a second type and has an input and an output. The directional coupler has a first terminal coupled to the output of the first amplifier, a second terminal coupled to the input of the second amplifier, and a third terminal coupled to the output of the second amplifier for providing a radio frequency output signal. The series-type Doherty amplifier circuit may also include variable phase and attenuation circuits for adjusting the phase and attenuation of input signal for the second amplifier. The ability to adjust phase and attenuation allows high operating efficiency for any saturation power level.

An attenuation circuit comprising: a connection-node for connecting to an RF connection; an isolation-capacitor connected in series between the connection-node and an internal-node; a first-bias-resistor connected in series between a first-control-node and the internal-node; a second-bias-resistor connected in series between the internal-node and a second-control-node; a first-attenuation-diode connected in series between the first-control-node and the internal-node, wherein the anode of the first-attenuation-diode is closest to the first-control-node; a second-attenuation-diode connected in series between the internal-node and the second-control-node, wherein the anode of the second-attenuation-diode is closest to the internal-node; a first-decoupling-capacitor connected in series between the first-control-node and the reference-node; and a second-decoupling-capacitor connected in series between the second-control-node and the reference-node.

A limiter circuit is integrated into an RF power amplifier. The limiter circuit automatically starts adding attenuation at the input of the RF power amplifier after a predetermined input power level threshold is exceeded, thereby extending the safe input drive level to protect the amplifier. In a preferred embodiment of the invention, the limiter circuit is implemented using a pseudomorphic high electron mobility transistor (PHEMT) device or a metal semiconductor field effect transistor (MESPET) device. Diode connected transistors or Schottky diodes may also be used in the limiter circuit.

Provided is a power amplification circuit that includes: a first transistor that has an emitter to which a first radio frequency signal is supplied, a base to which a first DC control current or DC control voltage is supplied and a collector that outputs a first output signal that corresponds to the first radio frequency signal; a first amplifier that amplifies the first output signal and outputs a first amplified signal; and a first control circuit that supplies the first DC control current or DC control voltage to the base of the first transistor in order to control output of the first output signal.

A microwave amplifier having a field effect transistor formed on an upper surface of a substrate. A de-Q'ing section connected to the field effect transistor includes: a de-Q'ing resistive via that passes through the substrate; and a de-Q'ing capacitor having one plate thereof connected a ground plane conductor through the de-Q'ing resistive via.

A power amplifier circuit includes an amplifier unit disposed on a die of a semiconductor device. The amplifier unit includes an amplifier transistor. The power amplifier circuit further includes a detector transistor disposed on the die of the semiconductor device, a variable attenuator that compensates for a gain of the amplifier unit, a bias level setting holding unit that holds a bias level setting value, which is set based on at least a detection value of the detector transistor, and a bias generation unit that generates a bias value of the variable attenuator based on the bias level setting value.

An amplifier circuit comprising: an amplifier; an output limiter for providing a variable impedance comprising: a first and second limiter terminal; a transistor comprising a conduction channel; a first resistor coupled in parallel with the conduction channel; and a capacitor coupled in series with the conduction channel between the conduction channel and the first or second limiter terminal; and a feedback control unit comprising a comparator block configured to provide a control signal to the output limiter based on a comparison of the amplifier output signal and a setting voltage; wherein: the first limiter terminal is coupled to the amplifier input or output; the second limiter terminal receives a reference voltage; and wherein receipt of the control signal at the transistor provides for a variable impedance for the amplifier circuit dependent on the amplifier output signal.

Power amplifier having analog pre-distortion by adaptive degenerative feedback. In some embodiments, a pre-distortion circuit for an amplifier can include a transistor having an input node for receiving an input signal, an output node for providing an output signal having a gain relative to the input signal, and a common node for coupling to a ground. The pre-distortion circuit can further include a degeneration circuit implemented between the common node and the ground, with the degeneration circuit being configured to introduce a feedback response that reduces the gain when the input signal has a power level at or below a selected level. The degeneration circuit can be further configured to be disabled or provide a reduced feedback response when the input signal has a power level that exceeds the selected level.

Apparatus and methods for radio frequency (RF) signal limiting are provided. In certain embodiments, an RF signal limiting system includes a cascade of a front limiter and a biased limiter. Additionally, the front limiter provides an initial amount of limiting to an RF signal, while the biased limiter serves to further limit the RF signal. The biased limiter is adaptively biased such that the amount of limiting provided to the RF signal increases in response to an increase in the RF signal level. Such an RF signal limiting system can be used in a variety of applications, including protecting an input of a low noise amplifier (LNA).