A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

A method comprises: measuring reflected and forward power at a power amplifier output; determining if the reflected power equals to or exceeds a first level; if the reflected power is equal to or exceeds the first level, then reduce power of a power amplifier input signal; determining if a standing wave ratio at the power amplifier output equals or exceeds a second level; if the standing wave ratio at the power amplifier output equals or exceeds the second level, then reducing the power amplifier input signal power level and/or sending an alarm; determining if the power amplifier output power equals or exceeds a third level; and if the power output from the power amplifier equals or exceeds the third level, then reducing the power amplifier input signal power level until such power level is less than or equal to the third level and/or sending an alarm.

A radio frequency signal transmission circuit includes a direct current blocking unit, a biasing impedance circuit, and a radio frequency element. The direct current blocking unit has a first terminal for receiving an input signal, and a second terminal coupled to a first bias voltage terminal. The biasing impedance circuit has a first terminal coupled to the first bias voltage terminal for providing a first bias voltage, and a second terminal coupled to a second bias voltage terminal for receiving a second bias voltage. The radio frequency element is coupled to the first bias voltage terminal, and receives and processes the input signal. When the biasing impedance circuit operates in a first mode, the biasing impedance circuit provides a first impedance. When the biasing impedance circuit operates in a second mode, the biasing impedance circuit provides a second impedance greater than the first impedance.

A power amplifier module that includes a power amplifier having a plurality of amplifier gain stages, a memory device including a plurality of memory locations, and a controller to receive a control signal having at least one of a first state and a second state. The plurality of memory locations includes at least one first memory location to store a first set of configuration parameters for operation in a first mode, and at least one second memory location to store a second set of configuration parameters for operation in a second mode. The controller configures the power amplifier module in the first mode based on the first set of configuration parameters responsive to receiving the control signal having the first state and configures the power amplifier module in the second mode based on the second set of configuration parameters responsive to receiving the control signal having the second state.

Methods and devices to improve the insertion loss at the LNA input of RF receivers are disclosed. The described methods and devices make use of the band switches in OFF state to improve the layout design, insertion loss and NF. Exemplary embodiments incorporating the disclosed concept are also presented.

Apparatus and methods for radio frequency (RF) signal limiting are provided. In certain embodiments, an RF signal limiting system includes a cascade of a front limiter and a biased limiter. Additionally, the front limiter provides an initial amount of limiting to an RF signal, while the biased limiter serves to further limit the RF signal. The biased limiter is adaptively biased such that the amount of limiting provided to the RF signal increases in response to an increase in the RF signal level. Such an RF signal limiting system can be used in a variety of applications, including protecting an input of a low noise amplifier (LNA).

Techniques for controlling the output of a power amplifier are disclosed. In one embodiment, the techniques may be realized as a system that includes a power amplifier and a controller coupled to the power amplifier to form a feedback loop. The power amplifier is enabled or disabled in response to a blanking signal. The controller includes an accumulator that stores an accumulated error of the feedback loop. The controller suspends operation of the accumulator when (1) a level of the input signal is below a first threshold for an amount of time that exceeds a second threshold, (2) the blanking signal indicates that the power amplifier is disabled, or (3) both. The controller resumes operation of the accumulator when (1) the level of the input signal is above the first threshold and (2) the blanking signal indicates that the power amplifier is enabled.

Some embodiments relate to a device, comprising an amplifier and a linearizer, the linearizer comprising a first transistor, the first transistor comprising a first terminal coupled to an input of the amplifier, a second terminal configured to be coupled to a DC supply voltage, and a control terminal configured to control a current flowing between the first and second terminals and configured to receive a DC bias voltage different from a voltage of the first terminal. Some embodiments relate to a device, comprising an amplifier, comprising an input, an output, and a first set of one or more transistors coupled between the input and the output, and a linearizer, comprising a second set of one or more transistors coupled between a DC supply voltage and the input of the amplifier, wherein the first set of transistors and the second set of transistors have a same topology.

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

A liquid ejecting apparatus includes a drive circuit that outputs a drive signal, wherein the drive circuit includes a modulation circuit that modulates a base drive signal to output a modulation signal, an amplifier circuit that amplifies the modulation signal to output an amplified modulation signal, a demodulation circuit that demodulates the amplified modulation signal to output the drive signal, and a substrate on which the modulation circuit, the amplifier circuit, and the demodulation circuit are provided, wherein the substrate includes a first face and a second face opposite to the first face, wherein the demodulation circuit includes a first coil and a second coil electrically coupled in parallel with the first coil, and wherein the first coil is positioned so as to overlap at least part of the second coil in a direction normal to the first face.